10ff | KitGuru https://www.kitguru.net KitGuru.net - Tech News | Hardware News | Hardware Reviews | IOS | Mobile | Gaming | Graphics Cards Sat, 18 Jul 2015 21:11:29 +0000 en-US hourly 1 https://wordpress.org/?v=6.4.3 https://www.kitguru.net/wp-content/uploads/2021/06/cropped-KITGURU-Light-Background-SQUARE2-32x32.png 10ff | KitGuru https://www.kitguru.net 32 32 TSMC: 10nm is on-track for volume production start in Q4 2016 https://www.kitguru.net/components/anton-shilov/tsmc-10nm-is-on-track-for-volume-production-start-in-q4-2016/ https://www.kitguru.net/components/anton-shilov/tsmc-10nm-is-on-track-for-volume-production-start-in-q4-2016/#comments Sat, 18 Jul 2015 00:49:05 +0000 http://www.kitguru.net/?p=259641 Taiwan Semiconductor Manufacturing Co. this week denied any delays of risk or mass production of chips using its 10nm process technology. The company intends to start volume production of semiconductors at 10nm node late next year, which means that its clients will receive their first 10nm chips in the first quarter of 2017. “The recent progress …

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Taiwan Semiconductor Manufacturing Co. this week denied any delays of risk or mass production of chips using its 10nm process technology. The company intends to start volume production of semiconductors at 10nm node late next year, which means that its clients will receive their first 10nm chips in the first quarter of 2017.

“The recent progress of our 10 nanometer technology development is very encouraging and on track with our plan,” said Mark Liu, president and co-CEO of TSMC, during the company’s earnings conference call with investors and financial analysts. “Technology risk start qualification is targeted at the end of this year, followed by many customer’s product qualifications. Our volume production is planned to start from the end of 2016.”

It should be noted that the start of production does not mean commercial shipments. Production cycle of an advanced chip made using 10nm FinFET process technology will likely exceed 100 days from wafer start to chip delivery, which means that the company will be able to ship the first batch to its customer(s) only in Q1 2017. TSMC will start high-volume production of chips using its 10nm process only in late Q1 or sometime in Q2 2017.

“We ramp up 10nm in the Q4 2016 next year, but the real product shipment will be in Q1 2017,” said C.C. Wei, president and co-CEO of TSMC.

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TSMC discloses different target characteristics of its 10nm FinFET (CLN10FF) manufacturing technology on different occasions, which indicates that they may not be finalized.

At present, the contract maker of semiconductors believes that its 10nm FinFET (CLN10FF) fabrication process will have 110 – 120 per cent higher transistor density compared to its 16nm FinFET+ (CLN16FF+) process tech, 15 per cent higher frequency potential at the same power and 35 per cent lower power consumption at the same frequency and complexity. Previously the company disclosed more optimistic expectations regarding clock-rates and power.

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With 10nm process technology, TSMC obviously concentrated mostly on increasing transistor density so that to decrease per-transistor costs of ICs made using the technology. Since TSMC’s 16nm processes rely on back-end-of-line interconnect flow originally developed for 20nm process, chips produced at 16nm node are not smaller than ICs [integrated circuits] made using 20nm tech. For many fabless semiconductor companies TSMC’s 16nm manufacturing technologies are too expensive because of high per-transistor costs as well as extreme design costs associated with FinFETs in general.

Performance improvements of TSMC’s 10nm fabrication tech compared to the company’s 16nm FinFET+ are not really impressive. In fact, the CLN16FF+ has similar advantages – up to 15 per cent higher clock-rate or up to 30 per cent lower power consumption – over the CLN16FF.

Discuss on our Facebook page, HERE.

KitGuru Says: While TSMC may start volume production of 10nm chips a little earlier than Intel, its CLN10FF fabrication technology will not help to significantly decrease power consumption or increase frequencies of processors. On the other hand, TSMC may introduce a better version of its 10nm manufacturing process later…

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TSMC rumoured to delay 10nm risk production, actual chips due in 2017 https://www.kitguru.net/components/cpu/anton-shilov/tsmc-rumoured-to-delay-10nm-risk-production-actual-chips-due-in-2017/ https://www.kitguru.net/components/cpu/anton-shilov/tsmc-rumoured-to-delay-10nm-risk-production-actual-chips-due-in-2017/#comments Sat, 11 Jul 2015 19:02:16 +0000 http://www.kitguru.net/?p=258589 If the semiconductor market rumours are correct, then Intel Corp. might not be the only chipmaker, which plans to delay mass production of chips using 10nm manufacturing process. Apparently, Taiwan Semiconductor Manufacturing Co. postpones risk production using 10nm fabrication process by two quarters. “TSMC will start risk production in its 10nm processing lines in the …

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If the semiconductor market rumours are correct, then Intel Corp. might not be the only chipmaker, which plans to delay mass production of chips using 10nm manufacturing process. Apparently, Taiwan Semiconductor Manufacturing Co. postpones risk production using 10nm fabrication process by two quarters.

“TSMC will start risk production in its 10nm processing lines in the second quarter of next year and mass production as early as the second half of next year, reports Business Korea.

TSMC officially said that it planned to start risk production of chips using 10nm process technology in the fourth quarter of 2015. Typically, it takes about a year to start mass production of semiconductors after the beginning of risk production. As a result, delay of risk production essentially means postponement of mass production.

If the information about the delay of 10nm risk production is correct, it means that the company will only start to produce 10nm chips in mid-2017, which may be a bad news for various fabless chip designers, including Apple, Nvidia Corp. and Xilinx.

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The delay may be a bad news for Apple, which introduces new iPhones in September and new iPads in October. In a bid to launch new products in time, Apple needs to start mass production of new system-on-chips in March or April. Production cycle for 10nm FinFET chips is over 90 days. Therefore, if TSMC starts high-volume production of 10nm ICs in June ‘17, it will not be able to meet Apple’s requirements for new iPhones. Meanwhile, Apple may sell around 100 million iPhones in Q4 2017, which means that it will need to get 100 million system-on-chips for them. It is unclear whether Samsung Foundry can produce 100 million SoCs using a leading-edge process tech for Apple.

TSMC’s 10nm manufacturing process will have 110 per cent higher logic density compared to its 16nm FinFET+ (CLN16FF+) process tech, 20 per cent higher clock-rate potential at the same power and 40 per cent lower power consumption at the same frequency.

TSMC did not comment on the news-story.

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KitGuru Says: It looks like 10nm is a tough nut to crack. Still, consider the news-story with a grain of salt since the information comes from an unofficial source.

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TSMC builds first 10nm validation chip with quad-core Cortex-A57 https://www.kitguru.net/components/anton-shilov/tsmc-builds-first-10nm-validation-chips-with-quad-core-arm-cortex-a57/ https://www.kitguru.net/components/anton-shilov/tsmc-builds-first-10nm-validation-chips-with-quad-core-arm-cortex-a57/#comments Sat, 04 Jul 2015 12:39:32 +0000 http://www.kitguru.net/?p=257461 Taiwan Semiconductor Manufacturing Co. has announced that it had produced the first verification chips for its 10nm manufacturing technology. The world’s largest contract maker of semiconductors plans to start risk production using 10nm fabrication process late this year and to initiate high-volume manufacturing in late 2016 or in 2017. At the 52nd Design Automation Conference …

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Taiwan Semiconductor Manufacturing Co. has announced that it had produced the first verification chips for its 10nm manufacturing technology. The world’s largest contract maker of semiconductors plans to start risk production using 10nm fabrication process late this year and to initiate high-volume manufacturing in late 2016 or in 2017.

At the 52nd Design Automation Conference in San Francisco, California, TSMC announced that it had successfully taped out and produced its first “product-like” validation vehicle for 10nm manufacturing technology, reports Nikkei BP. Earlier this year the company demonstrated a 300mm wafer processed using its 10nm tech containing SRAM memory. TSMC did not reveal when it produced the validation IC [integrated circuit], but since the symposium took place early last month, it is likely that TSMC got the chip in April or May.

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Validation vehicles are needed to make sure that the fabrication process, electronic design automation (EDA) software, interconnect flows, intellectual property and actual building blocks of chips work fine and can be used to design and produce commercial products. Validation vehicles may or may not feature complex chip designs, but they usually contain critical elements of chips. TSMC’s 10nm test IC features a quad-core ARM Cortex-A57 module, which is a clear indicator that the company’s 10nm FinFET (CLN10FF) process technology is ready for design of advanced system-on-chips. TSMC did not reveal any details about its validation vehicle or clock-rate potential of actual SoCs.

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TSMC unveiled the first details regarding its 10nm fabrication technology earlier this year. The company’s 10nm manufacturing process will have 110 per cent higher logic density compared to its 16nm FinFET+ (CLN16FF+) process tech, 20 per cent higher clock-rate potential at the same power and 40 per cent lower power consumption at the same frequency.

Increased transistor density means that per-transistor costs of 10nm chips will be lower than per-transistor costs of 16nm products. Nonetheless, since design of chips with FinFET transistors is generally very expensive and starts at around 80 million for a mainstream SoC, many smaller companies will be unable to utilize either 10nm or 16nm.

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TSMC started to construct its 10nm pilot line at its fab 15 phase 5 (pictured, located in Hsinchu Science Park, Taiwan) in June, according to media reports. The pilot line, which will cost TSMC over a billion of dollars, will take several months to complete and then TSMC will start trial production of actual chip designs in late 2015. In Q2 2016 the company is expected to start construction of  a brand new fab, which will be dedicated to 10nm manufacturing.

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It is interesting to note that TSMC still has plans to introduce a version of 10nm fabrication process that will use extreme ultraviolet (EUV) lithography production tools. Thanks to 13.5nm wavelength of EUV lasers, it will be possible to “draw” finer elements of chips without using tricky multiple-patterning techniques and implementing additional metal layers that complicate production process and make it more expensive. EUV also promises to bring significant benefits in terms of yield and cycle time. Since EUV will eliminate need for multi-patterning during production, design process of chips will get a bit simpler, which will let smaller companies to take advantage of ultra-thin FinFET process technologies.

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Samsung Technology has also demonstrated the first 300mm wafers processed using its 10nm manufacturing technology. The company hopes to start high-volume production of semiconductors using 10nm fabrication process in 2016.

Intel Corp. is expected to reveal more details regarding its 10nm plans later this year. Unofficial information points to the fact that the company will not start mass production of its 10nm chips before late 2016. Many believe that Intel will ramp 10nm production only in 2017.

GlobalFoundries has been developing its 10nm fabrication process in-house for a while. Since recently the company completed acquisition of IBM's microelectronics business, it is expected that its 10nm process will rely on technologies developed by engineers from both companies.

Discuss on our Facebook page, HERE.

KitGuru Says: TSMC is clearly on-track for risk production of chips using 10nm technology in late 2015, which means that if everything goes well and yields of actual ICs are fine, we will see the first commercial 10nm system-on-chips in 2017. But will the yields and costs be fine?

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TSMC to begin building 10nm pilot line in June https://www.kitguru.net/components/anton-shilov/tsmc-to-begin-building-10nm-pilot-line-in-june/ https://www.kitguru.net/components/anton-shilov/tsmc-to-begin-building-10nm-pilot-line-in-june/#respond Fri, 29 May 2015 01:57:00 +0000 http://www.kitguru.net/?p=251604 Taiwan Semiconductor Manufacturing Co. has announced that it will start to install equipment needed to produce 10nm chips in one of its semiconductor fabrication facilities next month. The company hopes to start risk production of 10nm chips late this year. TSMC will start to construct its 10nm pilot line at its fab 15 phase 5 …

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Taiwan Semiconductor Manufacturing Co. has announced that it will start to install equipment needed to produce 10nm chips in one of its semiconductor fabrication facilities next month. The company hopes to start risk production of 10nm chips late this year.

TSMC will start to construct its 10nm pilot line at its fab 15 phase 5 (which is located in Hsinchu Science Park, Taiwan) in June, 2015, reports UDN web-site. It will take several months to install the equipment, and then the line will become operational. It is highly likely that the company will start risk production of 10nm chips already in the fourth quarter of 2015. If TSMC delivers the first 10nm chip samples to its customers in calendar 2015, it will be in position to start commercial production of 10nm semiconductors in late 2016.

Earlier this year TSMC revealed the first details regarding its 10nm fabrication technology and demonstrated a 300mm wafer processed using its 10nm tech containing SRAM memory ICs [integrated circuits]. TSMC’s 10nm manufacturing process will have 110 per cent higher logic density compared to the company’s 16nm FinFET+ (CLN16FF+) process tech, 20 per cent higher clock-rate potential at the same power and 40 per cent lower power consumption at the same frequency.

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Samsung Electronics last week demonstrated one of the first 300mm wafers processed using its 10nm manufacturing technology. The company officially revealed plans to start high-volume production of semiconductors using 10nm fabrication process by the end of 2016.

Intel Corp. recently said that it would reveal its 10nm roadmap later in 2015. It is expected that the world’s largest maker of microprocessors will begin to produce commercial 10nm chips in 2016.

GlobalFoundries is currently developing its 10nm process technology.

Discuss on our Facebook page, HERE.

KitGuru Says: TSMC is slightly behind Intel (who already has 10nm pilot line at D1X fab in Hillsboro, Oregon) with its 10nm schedule, but this does not seem to be a problem for the world’s largest contract maker of semiconductors. Everything seems to be on track for TSMC and the first commercial 10nm chips produced by the company will likely hit the market in early 2017.

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TSMC’s 10nm goals: higher density and performance at lower power https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-unveils-10nm-process-techs-goals-higher-density-and-performance-at-lower-power/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-unveils-10nm-process-techs-goals-higher-density-and-performance-at-lower-power/#comments Fri, 10 Apr 2015 09:46:22 +0000 http://www.kitguru.net/?p=244445 Taiwan Semiconductor Manufacturing Co. this week unveiled first details about its 10nm fabrication process at the TSMC Technology Symposium in the U.S. The official goals are slightly less ambitious than those discussed last year, but the general focus of TSMC’s 10nm manufacturing technology is clear: considerable increase of transistor density compared to 16nm FinFET tech. TSMC’s 10nm …

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Taiwan Semiconductor Manufacturing Co. this week unveiled first details about its 10nm fabrication process at the TSMC Technology Symposium in the U.S. The official goals are slightly less ambitious than those discussed last year, but the general focus of TSMC’s 10nm manufacturing technology is clear: considerable increase of transistor density compared to 16nm FinFET tech.

TSMC’s 10nm process technology will have 110 per cent higher logic density compared to the company’s 16nm FinFET+ (CLN16FF+) process tech, 20 per cent higher clock-rate potential at the same power and 40 per cent lower power consumption at the same frequency. Development of the manufacturing tech is proceeding as planned. TSMC demonstrated a 300mm wafer processed using its 10nm process containing 256MB SRAM memory ICs [integrated circuits] at the symposium, reports EETimes Europe.

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Since TSMC’s 16nm FinFET manufacturing technologies rely on back-end-of-line interconnects (contacts, insulating layers, metal levels, and bonding sites) developed for the company’s 20nm process, geometries of chips produced using CLN16FF process are exactly the same as those of ICs made using CLN20SOC. Moreover, per-chip/per-gate costs of products made using TSMC’s 16nm FinFET are higher than those of chips produced using the company’s 20nm tech.

TSMC’s primary goal with 10nm process (CLN10FF) was to maximize logic densities so that to decrease per-chip and per-transistor costs of ICs made using the technology. 110 per cent higher logic density compared to the CLN16FF+ is a good achievement, even though it is lower compared to 125 per cent improvement discussed last summer.

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Earlier this year TSMC indicated that its 10nm manufacturing tech will be a very long lasting node that will address multiple areas and thousands of devices. The company expects 10nm to contribute over 50 per cent of its wafer revenue in 2020.

TSMC plans to install equipment for risk production using 10nm process technology in one of its existing fabs this year. Trial production is expected to begin in Q4 2015. The company also plans to start construction of a brand-new fab to make 10nm chips in the second quarter of 2016. Volume production using 10nm process tech will commence in 2017.

Discuss on our Facebook page, HERE.

KitGuru Says: TSMC is behind its rivals when it comes to production using a FinFET technology, hence, the firm is attempting to speed up 10nm development and mass production. The fact that the firm has adjusted its goals indicates that its CLN10FF is still a work in progress, which is okay since TSMC has two years to perfect the tech.

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TSMC looking at new materials, transistor structures for sub-10nm tech https://www.kitguru.net/components/anton-shilov/tsmc-looking-at-advanced-materials-new-transistor-technologies-for-sub-10nm-tech/ https://www.kitguru.net/components/anton-shilov/tsmc-looking-at-advanced-materials-new-transistor-technologies-for-sub-10nm-tech/#respond Sat, 04 Apr 2015 18:58:29 +0000 http://www.kitguru.net/?p=243736 Taiwan Semiconductor Manufacturing Co. this week confirmed that it has a team of engineers working on a manufacturing process that will succeed 10nm fabrication technology towards the end of the decade. While the company did not reveal details about its sub-10nm process, it said that it considers various options for it, including new lithography tools, …

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Taiwan Semiconductor Manufacturing Co. this week confirmed that it has a team of engineers working on a manufacturing process that will succeed 10nm fabrication technology towards the end of the decade. While the company did not reveal details about its sub-10nm process, it said that it considers various options for it, including new lithography tools, transistor structures and materials.

“We are working on future platform technology development,” said Suk Lee, senior director of design infrastructure marketing division of TSMC in an interview with Cadence. “We have a team working on the next generation after 10nm. Those technologies are going to be offered in the 2017 to 2019 period. We do not anticipate Moore's Law is going to slow down anytime soon.”

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Back in February Intel Corp. and Samsung Electronics confirmed that their research and development (R&D) teams are already working on 7nm manufacturing technologies that will be used to make highly-sophisticated computer chips. Intel confirmed that it was looking at all-new materials for its 7nm production process. Recently rumours emerged that the chipmaker is working with Honeywell, a multinational conglomerate company with a lot of expertise in chemistry and high tech, on the materials for its 7nm manufacturing tech. Samsung Electronics said that it was considering switching to a new transistor structure from FinFET/tri-gate. According to the company, gate-all-around FETs will be viable at 7nm and beyond. Samsung also implied that it would look at new materials for its 7nm fabrication process as well.

TSMC constantly makes updates regarding progress of its preparations to manufacturing using 10nm fabrication process and makes no secret that its process technology options are rather flexible. For example, TSMC is working with ASML, a leading maker of semiconductor manufacturing equipment, on a mid-node insertion of extreme ultraviolet lithography (EUV) at the 10nm logic node, which is expected to happen in late 2016. However, the company has always been tight-lipped on its processes beyond 10nm. In fact, the company even does not want to talk about exact feature size of the process.

“I do not want to make any comment on a specific technology node number,” said Mr. Lee.

But while we do not know what is exactly TSMC developing, the director of design infrastructure marketing division of TSMC revealed that the company is – just like its rivals – considering new materials and new transistor structures for its sub-10nm fabrication process.

“We are looking at advanced materials, different kinds of transistor technologies,” said Mr. Lee.

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In fact, keeping in mind that TSMC definitely wants to use EUV lithography at some point, it is more concerned about tools rather than transistor structures or materials. Obviously, the company is working in different directions and at some point will make decisions regarding exact materials and transistor structures for its sub-10nm process tech. However, the EUV-related challenges preserve the company from making any announcements today.

“But the immediate next big challenge has to do with continuing the ability to do patterning based on existing light sources,” stated the high-ranking TSMC rep. “At 10nm, no one is dependent on EUV. We have set up our 10nm technology so that when and if EUV comes on line we can take advantage of it. We continue to work with ASML on EUV tools. The technology itself is very complex. We need to get to a point where there's sufficient wattage and uptime so there are significant wafer volumes.”

Discuss on our Facebook page, HERE.

KitGuru Says: 7nm process technology will not be used for commercial chips until at least 2019. However, three leading semiconductor companies – Intel, Samsung and TSMC – are already developing manufacturing processes to produce chips for your 2020 smartphone, tablet and PC.

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TSMC: We will close the gap with Intel at 10nm! https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-we-will-close-the-gap-with-intel-at-10nm/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-we-will-close-the-gap-with-intel-at-10nm/#comments Wed, 25 Feb 2015 03:29:09 +0000 http://www.kitguru.net/?p=237422 Taiwan Semiconductor Manufacturing Co. believes that its 10nm fabrication process will not only be available around the same time when Intel Corp. starts to use its 10nm technology, but will also offer similar performance and density as Intel’s. In a bid to speed up time-to-market of their manufacturing processes featuring FinFET transistors, leading contract makers of …

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Taiwan Semiconductor Manufacturing Co. believes that its 10nm fabrication process will not only be available around the same time when Intel Corp. starts to use its 10nm technology, but will also offer similar performance and density as Intel’s.

In a bid to speed up time-to-market of their manufacturing processes featuring FinFET transistors, leading contract makers of semiconductors had to mix multi-gate transistors with back-end-of-line (BEOL) interconnect flows of their 20nm manufacturing technologies. As a result, while TSMC, GlobalFoundries and Samsung Electronics formally offer their customers 14nm and 16nm FinFET processes, which can speed up various chips or cut down their power consumption, they only offer chip geometries comparable to those of products made using 20nm technologies. By contrast, Intel has “true” 14nm fabrication tech and can benefit from smaller CPU sizes and costs. With 10nm TSMC will move on to 10nm BEOL interconnects and thus will give its customers an opportunity to shrink their chips.

“The performance of our 10nm, in terms of speed, power and density will be equal to what we believe Intel will define as its 10nm technology,” said Elizabeth Sun, TSMC Director of Corporate Communications, in an interview with EE Times. “Technology-wise, we think we can close the gap at 10nm.”

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According to TSMC’s predictions, its 10nm FinFET will offer over 25 per cent clock-rate improvement over the 16nm FinFET+ at the same power, it is projected to be 45 per cent more energy efficient and is predicted to provide 2.2 times higher density over 16nm FinFET+, which is a massive improvement. Risk production of 10nm FinFET chips is scheduled to start in the fourth quarter of 2015, whereas high-volume manufacturing will begin in 2017.

As reported, TSMC will use both immersion as well as extreme ultraviolet (EUV) lithography tools for 10nm production. The company yet has to provide precise details how it plans to use EUV. The use of EUV for process technology beyond 10nm still depends on whether it will be ready for manufacturing.

“We are working with ASML with the objective at some future point if extreme ultraviolet (EUV) becomes manufacturing ready, we can insert EUV partially to 10nm,” said Ms. Sun. “Partial insertion means only in a few critical layers. It is still a work in progress.”

TSMC has been aggressively increasing spending on research and development and manufacturing capacity expansion in the recent years. This should help the company to offer manufacturing technologies comparable to those used by Intel to make its microprocessors.

Discuss on our Facebook page, HERE.

KitGuru Says: It is interesting that TSMC does not compare itself with other foundries anymore, but prefers to compare itself against Intel, which has not yet become a major contract maker of semiconductors.

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Samsung: 10nm technology in development, 7nm will require new transistors https://www.kitguru.net/components/graphic-cards/anton-shilov/samsung-10nm-technology-in-development-7nm-will-require-new-transistors/ https://www.kitguru.net/components/graphic-cards/anton-shilov/samsung-10nm-technology-in-development-7nm-will-require-new-transistors/#comments Wed, 25 Feb 2015 02:45:34 +0000 http://www.kitguru.net/?p=237410 Kinam Kim, the president of Samsung Electronics’ semiconductor business, presented his view on the development of chip manufacturing technologies at the International Solid-State Circuits Conference 2015 this week. Samsung is already developing its next-generation 10nm FinFET fabrication process, but in order to continue scaling down structures of chips, new materials and even new transistor structures …

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Kinam Kim, the president of Samsung Electronics’ semiconductor business, presented his view on the development of chip manufacturing technologies at the International Solid-State Circuits Conference 2015 this week. Samsung is already developing its next-generation 10nm FinFET fabrication process, but in order to continue scaling down structures of chips, new materials and even new transistor structures will be needed for sub-10nm technologies, according to the executive.

“We believe the sky is the limit when it comes to developing refining technologies for semiconductors,” said Mr. Kim during his keynote, reports WhowiredKorea. “Samsung Electronics will continue to pursue its semiconductor innovations in order to create more amazing business opportunities in the industry.”

Despite concerns for the demise of scaling, higher performance in electronic systems for the coming decades is expected, thanks to innovations in materials, structures, and processes, claims the head of Samsung’s contract semiconductor manufacturing business. According to Mr. Kim, Samsung is already developing its 10nm fabrication process and it is logical to expect chips made using this technology to emerge on the market in late 2016, or sometime in 2017.

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Beyond 10nm things will get trickier, but 7nm and 5nm manufacturing technologies are perfectly viable. Dr. Kinam Kim believes that at 7nm it makes sense to switch to a new transistor structure from FinFET/tri-gate. According to the executive, gate-all-around FETs will be viable at 7nm and beyond, reports TechOn. In GAA FETs gate material surrounds the channel region on all sides; GAA FETs can have two or four effective gates. It is interesting to note that Gate-all-around FETs have been implemented both using silicon nanowire as well as Indium gallium arsenide (InGaAs) nanowires. Therefore, it is possible that Samsung, just like Intel, is mulling to use InGaAs material at 7nm and beyond.

Taking into account that the amount of various mobile devices will get very high in the coming years, thinner manufacturing technologies will be required to build power efficient chips for them. Thus, it is about time for Intel, Samsung and other industry leaders to start thinking about 7nm, 5nm and more advanced technologies.

Discuss on our Facebook page, HERE.

KitGuru Says: Looks like the semiconductor industry will face a lot of major changes in the coming years. Drastic changes usually mean that weak players either disappear from the market, or merge with stronger players.

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TSMC to start volume production of 10nm chips in 2017 https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-to-start-volume-production-of-10nm-chips-in-2017/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-to-start-volume-production-of-10nm-chips-in-2017/#comments Tue, 20 Jan 2015 23:13:08 +0000 http://www.kitguru.net/?p=231554 Taiwan Semiconductor Manufacturing Co. has delayed volume production of chips using 16nm FinFET manufacturing technologies by several quarters. As a result, it now has to reconsider plans regarding production of semiconductors using 10nm FinFET fabrication process. Previously it was expected that the company will produce 10nm chips in late 2016, but at present the company’s …

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Taiwan Semiconductor Manufacturing Co. has delayed volume production of chips using 16nm FinFET manufacturing technologies by several quarters. As a result, it now has to reconsider plans regarding production of semiconductors using 10nm FinFET fabrication process. Previously it was expected that the company will produce 10nm chips in late 2016, but at present the company’s official expectation is 2017.

“Our 10nm technology development is progressing and our qualification schedule at the end of 2015, end of this year, remains the same,” said Mark Liu, president and co-CEO of TSMC, during a conference call with investors and financial analysts. “We are now working with customers for their product tape-outs. We expect its volume production in 2017.”

According to TSMC’s predictions, its 10nm FinFET will offer over 25 per cent clock-rate improvement over the 16nm FinFET+ at the same power, it is projected to be 45 per cent more energy efficient and is predicted to provide 2.2 times higher density over 16nm FinFET+, which is a massive improvement. Risk production of 10nm FinFET chips is scheduled to start in the fourth quarter of 2015.

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At present TSMC is developing its 10nm FinFET manufacturing technology and not a lot of information is known about the process. What is obvious is that the new fabrication tech will not rely on the back-end of the 20nm process technology, like the company’s 16nm FinFET technologies do. As a result, it will be possible for fabless semiconductor makers not only shrink die sizes of their chips in 2017, but to reduce cost-per-transistor too.

Keeping in mind that TSMC will only start volume production using 16nm FinFET technologies in the meaningful quantities in the fourth quarter of 2015, the majority of TSMC’s customers will not require 10nm process earlier than in the first half of 2017.

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KitGuru Says: For TSMC, it is crucial to start volume production of chips using the most advanced process technologies ahead of its rivals. A more conservative approach – which includes delay of 16nm FF mass production and a slight reconsideration of 10nm plans – means that the company will not be able to stay ahead of its competitors, at least when it comes to leading edge technologies.

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ARM and TSMC expect first 10nm tape-outs in late 2015 https://www.kitguru.net/components/cpu/anton-shilov/arm-and-tsmc-expect-first-10nm-tape-outs-in-late-2015/ https://www.kitguru.net/components/cpu/anton-shilov/arm-and-tsmc-expect-first-10nm-tape-outs-in-late-2015/#comments Fri, 03 Oct 2014 02:03:20 +0000 http://www.kitguru.net/?p=214976 ARM Holdings and Taiwan Semiconductor Manufacturing Co. on Thursday outlined some details regarding transition of chip production to 10nm FinFET manufacturing technology. The company’s reaffirmed that risk production of chips made using 10nm FF fabrication process will start in late 2015. The two companies agreed to work together on 10nm FinFET ARM Artisan physical IP of …

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ARM Holdings and Taiwan Semiconductor Manufacturing Co. on Thursday outlined some details regarding transition of chip production to 10nm FinFET manufacturing technology. The company’s reaffirmed that risk production of chips made using 10nm FF fabrication process will start in late 2015.

The two companies agreed to work together on 10nm FinFET ARM Artisan physical IP of ARMv8-A-based processors. The companies did not reveal which processor cores will be implemented in 10nm FF, but it is logical to expect both current-generation ARM Cortex-A53/A57 as well as next-generation code-named Artemis and Maya cores. Physical implementations of ARMv8-A cores will help chip developers to easily integrate them into their 10nm FF designs.

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ARM and TSMC expect their customers to tape-out (the point at which the artwork for the photomask of a circuit is sent for manufacture) the first 10nm FinFET designs as early as in Q4 2015. The first tape-outs of chips are usually called risk production. Typically mass production using a fabrication process starts a year after risk production.

Based on TSMC’s predictions, its 10nm FinFET will offer over 25 per cent clock-rate improvement over the 16nm FinFET+ at the same power; it is also expected to be 45 per cent more energy efficient and it is predicted to provide 2.2 times higher density over 16nm FinFET+.

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KitGuru Says: Basically speaking, ARM and TSMC agreed to help their clients with transition to 10nm FinFET manufacturing technology as well as re-emphasized TSMC’s commitment to start risk production using the process in late 2015. What will be truly interesting know is when TSMC plans to start mass production of 10nm FF chips as market rumours claim that the company wants to speed up commercial launch of its 10nm FinFET process to become more competitive against rivals.

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