14nm FinFET | KitGuru https://www.kitguru.net KitGuru.net - Tech News | Hardware News | Hardware Reviews | IOS | Mobile | Gaming | Graphics Cards Fri, 19 May 2017 12:50:28 +0000 en-US hourly 1 https://wordpress.org/?v=6.4.3 https://www.kitguru.net/wp-content/uploads/2021/06/cropped-KITGURU-Light-Background-SQUARE2-32x32.png 14nm FinFET | KitGuru https://www.kitguru.net 32 32 Sapphire RX 580 Nitro+ Limited Edition 8GB Review https://www.kitguru.net/components/graphic-cards/ryan-martin/sapphire-rx-580-nitro-limited-edition-8gb-review/ https://www.kitguru.net/components/graphic-cards/ryan-martin/sapphire-rx-580-nitro-limited-edition-8gb-review/#comments Tue, 18 Apr 2017 13:01:57 +0000 http://www.kitguru.net/?p=330495 Sapphire makes the best of AMD's RX 580 refresh with its Nitro+ version.

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While AMD's Ryzen has disrupted Intel's long-running hegemony in the CPU market, AMD has been relatively subdued in the GPU market of late resulting in Nvidia's continuing dominance of market share, particularly at the mid-range and beyond. AMD has today taken steps to change this with two “new ” GPUs for its RX 500 series, the RX 570 and RX 580, hoping to attract new customers in the mid-range market.

Enthusiasts expecting to see a brand new graphics architecture (or product) may be disappointed since the RX 580 and 570 are, for all intents and purposes, lifted from the RX 400 series with only incremental tweaks. The RX 580, the focus of this review, is based on the 14nm Polaris RX 480 while the RX 570, also launching today, is based on the RX 470. Enthusiasts looking for something truly new will have to continue waiting for AMD Vega which is expected out at some point later this year.

This launch draws striking similarities to AMD's release of the R9 390X and R9 390 back in 2015, which were based on the R9 290X and R9 290, respectively. AMD faced criticism at the time for the move since it had been very active in the process of rebranding and re-releasing existing GPUs as new products. AMD waved away criticism of the R9 390X and R9 390 stating the GPUs were new given the frequency increases, increased video memory and power management tweaks.

The RX 580, and RX 570, are new in so far as they are built from a refined 14nm FinFET process to achieve better typical clock speeds. AMD has also made some tweaks to the power management to reduce power consumption and increase power efficiency under a number of scenarios including multi-monitor, multimedia playback and system idle.

AMD has been able to achieve this by adding a third intermediate memory state to reduce power consumption, which sits alongside two existing memory states. To over-simplify, the current Polaris GPU effectively has two memory states, low and high, and most GPU activities (including having a second display) alter the memory state from low to high, increasing power consumption in the process. The new third intermediate memory stage now means the refined Polaris GPU has low, medium and high. In many cases a load activity can increase it to medium, before high, thus resulting in lower overall power draw.

AMD is using the RX 500 series launch as a platform to introduce a new feature it's calling Radeon Chill, which effectively reduces the frame-rate when the user is in-game but idle or AFK (away from keyboard) and then increases the frame-rate again when the user becomes active. It also caps “excessively high” frame rates to further reduce power consumption.

AMD doesn't specify how it achieves reductions in frame-rate, presumably it does this through a clock speed reduction, but the end result is still less power consumption. This new setting can be turned on or off from the AMD Settings included in the driver package and a long list of games is initially supported including Counter Strike: Global Offensive, League of Legends and Dota 2.

In this review we are assessing Sapphire's take on the RX 580, the Sapphire RX 580 Nitro+ OC Limited Edition graphics card with 8GB of video memory. Any KitGuru readers feeling a sense of Déjà vu right now can refer back to our previous review on the Sapphire RX 480 Nitro+ OC graphics cards to confirm their suspicions.

Sapphire has left its previous design mostly unchanged with the release of the RX 580 Nitro+ Limited Edition. Certainly, that is no bad thing for prospective customers since the Nitro+ cooler was already effective with good build quality and a sturdy backplate. Clock speeds on the Sapphire RX 580 Nitro+ are more aggressive out of the box to reflect the higher clocking capability of the RX 580 versus the RX 480 which will result in more performance.

Our sample ran out of the box at 1450MHz on the core, up from 1342MHz on the RX 480 Nitro+ OC 8GB graphics card. That's a 108MHz increase in frequency, equating to 8%, while the memory remains unchanged at 2000MHz actual, 8000MHz effective.

Given that the RX 580 brings no Instructions Per Clock (IPC) improvement, we should expect to see that the only additional performance the RX 580 brings over the RX 480 stems from it's increased frequency. If both were clocked identically then performance would be identical.

The out of the box frequency can be changed by toggling between two different BIOS modes using a switch. Silent sets the core at 1411MHz while Boost ups this to 1450MHz. Since it requires minimal user effort to enable the faster Boost setting, we tested throughout our review using this mode.

GPU AMD RX 480 AMD RX 580 AMD RX 470 AMD RX 570 AMD R9 390
Nvidia GTX 1050 Ti Nvidia GTX 1060
Streaming Multiprocessors / Compute Units
 36 36 32 32 40 6 10
GPU Cores  2304 2304  2048 2048 2560 768 1280
Texture Units 144 144  128 128  160 48 80
ROPs 32  32  32 32  64 32 48
Base Clock  1120 MHz 1257 MHz  926 MHz 1168 MHz Up to 1000MHz 1290 MHz 1506 MHz
GPU Boost Clock  1266 MHz 1340 MHz  1206 MHz  1244 MHz Up to 1000MHz 1392 MHz 1708 MHz
Total Video memory 4096 or 8192 MB 4096 or 8192 MB  4096 or 8192 MB 4096 MB  8192 MB 4096 MB 6144 MB
Memory Clock (Effective)
1750 (7000) or 2000 (8000) MHz 2000 (8000) MHz  1650 (6600) MHz  1750 (7000) MHz  1500 (6000) MHz  1752 (7008) MHz 2002 (8008) MHz
Memory Bandwidth  224 or 256 GB/s  256 GB/s 211 GB/s  224 GB/s 384 GB/s 112 GB/s 192 GB/s
Bus Width  256-bit   256-bit    256-bit  256-bit  512-bit 128-bit 192-bit
Manufacturing Process 14nm  14nm 14nm  14nm 28nm 16nm 16nm
TDP  150 W  185 W 120 W 150 W 275 W 75W 120 W

In terms of positioning nothing has changed for AMD, the RX 580 just like the RX 480 goes after the GTX 1060, with the smaller RX 470 going against the GTX 1050 Ti.

AMD has not been clear about whether or not the RX 480 and RX 470 will be officially discontinued from today, however, we imagine this will be the case and so there may be bargains to be had for buyers of “old” RX 480 and RX 470 stock.

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ASUS RX 570 STRIX Gaming OC 4GB Review https://www.kitguru.net/components/graphic-cards/ryan-martin/asus-rx-570-strix-gaming-oc-4gb-review/ https://www.kitguru.net/components/graphic-cards/ryan-martin/asus-rx-570-strix-gaming-oc-4gb-review/#comments Tue, 18 Apr 2017 13:00:03 +0000 http://www.kitguru.net/?p=330519 The RX 470 is back except faster, and don't forget to swap that 4 for a 5, RX 570, that's better.

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AMD is looking to keep the ball rolling with new GPU releases until the new Vega architecture arrives later this year. One of the methods AMD is doing this by is refreshing its existing GPU range to stay competitive, both the RX 470 and RX 480 are being refreshed to produce the RX 570 and RX 580.

This refresh is nothing AMD hasn't tried before, it executed a similar strategy when it refreshed the R9 290 and 290X GPUs in 2015 to release the R9 390 and 390X. RX 570, the focus of this review, is based upon the RX 470 from the current RX 400 series. At a fundamental level this is still the same graphics processing unit as before, 14nm and based on the Polaris architecture, but with a few tweaks to improve the end product.

These tweaks concern two key areas, standard clock speeds and power consumption. In terms of clock speeds the default clock speed for the RX 570 is now higher with a peak clock speed of 1244MHz compared to 1206MHz and a considerably higher base clock, 1168MHz versus 926MHz. The end result is that on average a stock RX 570 will always be operating at a higher frequency than an equivalent RX 470, though this comes at the expense of an increased TDP which rises from 120- to 150-watts.

The default memory frequency is also now higher, to the tune of 100 MHz actual, 400MHz effective, but the standard memory configuration of 4GB of memory remains unchanged. AMD may still allow board partners to offer 8GB versions of the RX 570, like it did with the RX 470, but for the capability of the RX 570 GPU anything above 4GB is likely excessive.

The second area of change, power consumption, is where AMD has altered power management techniques to increase power efficiency under a number of scenarios including multi-monitor, multimedia playback and system idle.

AMD has been able to achieve this by adding a third intermediate memory state to reduce power consumption, which sits alongside two existing memory states. To over-simplify, the current Polaris GPU effectively has two memory states, low and high, and most GPU activities (including having a second display) alter the memory state from low to high, increasing power consumption in the process. The new third intermediate memory stage now means the refined Polaris GPU has low, medium and high. In many cases a load activity can increase it to medium, before high, thus resulting in lower overall power draw.

AMD is using the RX 500 series launch as a platform to introduce a new feature it's calling Radeon Chill, which effectively reduces the frame-rate when the user is in-game but idle or AFK (away from keyboard) and then increases the frame-rate again when the user becomes active. It also caps “excessively high” frame rates to further reduce power consumption, though how this will be implemented is not clearly specified.

Our RX 570 review sample for today is the ASUS RX 570 Strix Gaming OC 4GB graphics card. This is factory overclocked 56MHz above AMD's stock settings for the RX 570 GPU while the GDDR5 memory remains unchanged at 1750 (7000) MHz. At a specification level the ASUS RX 570 Strix Gaming OC 4GB is virtually identical to the ASUS RX 470 Strix Gaming OC 4GB (see our review of that here) except with an extra 50MHz on the core clock and 100 (400) MHz on the memory.

Like its RX 470 predecessor the ASUS RX 570 can toggle an OC Mode if the user installs the ASUS GPU Tweak software. In the case of the RX 470 it bumped the core clock from 1250 to 1270MHz, with the RX 570 it increases it from 1300 to 1310MHz and increases the power target from 100 to 110%. A minor change but an easy one for buyers who lack the confidence to overclock themselves.

GPU AMD RX 480 AMD RX 580 AMD RX 470 AMD RX 570 AMD R9 390
Nvidia GTX 1050 Ti Nvidia GTX 1060
Streaming Multiprocessors / Compute Units
 36 36 32 32 40 6 10
GPU Cores  2304 2304  2048 2048 2560 768 1280
Texture Units 144 144  128 128  160 48 80
ROPs 32  32  32 32  64 32 48
Base Clock  1120 MHz 1257 MHz  926 MHz 1168 MHz Up to 1000MHz 1290 MHz 1506 MHz
GPU Boost Clock  1266 MHz 1340 MHz  1206 MHz  1244 MHz Up to 1000MHz 1392 MHz 1708 MHz
Total Video memory 4096 or 8192 MB 4096 or 8192 MB  4096 or 8192 MB 4096 MB  8192 MB 4096 MB 6144 MB
Memory Clock (Effective)
1750 (7000) or 2000 (8000) MHz 2000 (8000) MHz  1650 (6600) MHz  1750 (7000) MHz  1500 (6000) MHz  1752 (7008) MHz 2002 (8008) MHz
Memory Bandwidth  224 or 256 GB/s  256 GB/s 211 GB/s  224 GB/s 384 GB/s 112 GB/s 192 GB/s
Bus Width  256-bit   256-bit    256-bit  256-bit  512-bit 128-bit 192-bit
Manufacturing Process 14nm  14nm 14nm  14nm 28nm 16nm 16nm
TDP  150 W  185 W 120 W 150 W 275 W 75W 120 W

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AMD’s future ‘Bristol Ridge’ and ‘Stoney Ridge’ APUs listed in BIOS https://www.kitguru.net/components/cpu/anton-shilov/amds-future-bristol-ridge-and-stoney-ridge-apus-listed-in-bios-binaries/ https://www.kitguru.net/components/cpu/anton-shilov/amds-future-bristol-ridge-and-stoney-ridge-apus-listed-in-bios-binaries/#comments Tue, 29 Sep 2015 22:07:04 +0000 http://www.kitguru.net/?p=269880 An undisclosed maker of motherboards has already added mentions of AMD’s upcoming accelerated processing units in the binary of its BIOS. It is highly likely that AMD’s latest reference BIOS versions already include support of the company’s future microprocessors. As a result, mentions of the chips migrate to commercial products. Planet3DNow reports that the latest …

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An undisclosed maker of motherboards has already added mentions of AMD’s upcoming accelerated processing units in the binary of its BIOS. It is highly likely that AMD’s latest reference BIOS versions already include support of the company’s future microprocessors. As a result, mentions of the chips migrate to commercial products.

Planet3DNow reports that the latest BIOS binary version PI 1.4 contains references to AMD’s “Stoney Ridge” (ST) and “Bristol Ridge” (BR) accelerated processing units that are due next year. The addition of the processors to AMD’s reference BIOS indicates that the company has already begun preparations for the launch of its new accelerated processing units.

Both “Bristol Ridge” and “Stoney Ridge” accelerated processing units will use all-new AM4 form-factor and will be made using an existing 28nm process technology. The “Bristol Ridge” integrates four “Excavator” cores, Radeon graphics based on the GCN 1.2 architecture, a dual-channel DDR4 memory controller as well as basic input/output capabilities. The “Stoney Ridge” is expected to sport two “Excavator” cores, AMD Radeon graphics with up to 192 stream processors, a single-channel DDR4 memory controller and basic I/O functions.

amd_fusion_600

The “Bristol Ridge” processors are projected to hit the market in late Q2 or early Q3 2016. The chips will offer 10 to 15 per cent higher performance than current-generation “Kaveri” chips, hence, it will not be revolutionary at all. The “Stoney Ridge” is projected to emerge in late 2016 and will be aimed at low-cost PCs.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: If AMD adds support for “Bristol Ridge” and “Stoney Ridge” accelerated processing units in its reference BIOS versions, it is highly likely that the chips will actually be introduced. Since neither of APUs are game changers, it is not really important when AMD plans to introduce them. What is important is when the company intends to release its “Raven Ridge” APU with “Zen” cores and new-generation Radeon graphics adapter.

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AMD engineer: Developers were given the total freedom with ‘Zen’ https://www.kitguru.net/components/cpu/anton-shilov/amd-engineer-developers-were-given-the-total-freedom-with-zen/ https://www.kitguru.net/components/cpu/anton-shilov/amd-engineer-developers-were-given-the-total-freedom-with-zen/#comments Wed, 23 Sep 2015 10:21:26 +0000 http://www.kitguru.net/?p=268893 The “Zen” micro-architecture is a tremendously important project for Advanced Micro Devices. If the new technology is successful, AMD will become a viable developer of central processing units again. If not, the company will have troubles with surviving. Fortunately, “Zen” is a completely new micro-architecture that promises to be very competitive. Apparently, the management team …

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The “Zen” micro-architecture is a tremendously important project for Advanced Micro Devices. If the new technology is successful, AMD will become a viable developer of central processing units again. If not, the company will have troubles with surviving. Fortunately, “Zen” is a completely new micro-architecture that promises to be very competitive. Apparently, the management team gave a lot of freedom with the new CPU design.

“It is the first time in a very long time that we engineers have been given the total freedom to build a processor from scratch and do the best we can do,” said Suzanne Plummer, a director of design engineering at AMD and also a veteran Austin chip engineer, who heads development of a “Zen”-based processor, in an interview with MyStatesman.

amd_zen_performance_advantages_fad

Last week AMD announced that Jim Keller, a legendary processor engineer who headed development of “Zen” micro-architecture, had left the company. It is believed that he has completed the work on the first two iterations of the “Zen” technology. He also worked on the “K12” architecture, which is compatible with the ARMv8-A instruction set architecture.

“[Zen] is a multi-year project with a really large team,” said Ms. Plummer. “It’s like a marathon effort with some sprints in the middle. The team is working very hard, but they can see the finish line. I guarantee that it will deliver a huge improvement in performance and (low) power consumption over the previous generation.”

Ms. Plummer has worked at AMD since 2002, when the company took over Alchemy Semiconductor.

amd_zen_performance_advantages_fad_1

The first processor based on “Zen” micro-architecture is code-named “Summit Ridge”. The chip is expected to hit the market in October, 2016, and aim at high-end desktops and servers. The new cores will offer at least 40 per cent performance improvement at the same clock-rate compared to existing cores.

“Everything is riding on ‘Zen’,” said analyst Nathan Brookwood with Insight 64. “They are shooting for performance parity with where (arch-rival) Intel will be. AMD understands that they have to succeed with ‘Zen’. If ‘Zen’ fizzles, they will really have to do a lot of running around.”

Discuss on our Facebook page, HERE.

KitGuru Says: “Zen” will be AMD’s first major new design since 2011. It has to be successful. If it is not successful, AMD’s share in the market of CPUs will shrink even further.

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Legendary microprocessor developer Jim Keller leaves AMD https://www.kitguru.net/components/cpu/anton-shilov/legendary-microprocessor-developer-jim-keller-leaves-amd/ https://www.kitguru.net/components/cpu/anton-shilov/legendary-microprocessor-developer-jim-keller-leaves-amd/#comments Fri, 18 Sep 2015 22:21:18 +0000 http://www.kitguru.net/?p=268441 Advanced Micro Devices on Friday said that Jim Keller, a legendary microprocessor architect, will leave the company, effective immediately. Mr. Keller worked on multiple future generations of central processing units (CPUs) and system-on-chips (SoCs) at AMD, his departure will have an effect on the company’s long-term roadmap, but will not have any effect on products …

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Advanced Micro Devices on Friday said that Jim Keller, a legendary microprocessor architect, will leave the company, effective immediately. Mr. Keller worked on multiple future generations of central processing units (CPUs) and system-on-chips (SoCs) at AMD, his departure will have an effect on the company’s long-term roadmap, but will not have any effect on products in the next several years.

No immediate effect on product roadmap

AMD indicated that Jim Keller leaves the company after just three years to “pursue other opportunities.” Mark Papermaster, AMD’s chief technology officer, will be the acting leader of CPU architecture development group previously led by Mr. Keller. Eventually, AMD will have to find a decent replacement for the legendary chip architect.

“Deep team was in place to drive completion phase of our next-generation ‘Zen’ core and associated system IP and SOCs,” said Drew Prairie, director of corporate communications at AMD. “Jim Keller’s departure is not expected to impact our public product or technology roadmaps, and we remain on track for ‘Zen’ availability in 2016 with first full year of revenue in 2017. There are no other organizational changes related to Jim’s departure.”

amd_cpu_jim_keller

Jim Keller, a legendary CPU architect, is best known for such high-performance designs as DEC’s Alpha 21164 and 21264, AMD’s “K8” (Athlon 64/Opteron), Apple’s “Swift”, “Cyclone”, “Typhoon” as well as multiple successful PowerPC- and MIPS-based system-on-chips. After Mr. Keller completed his work on “K8”, he left AMD in 1999. He returned to AMD in 2012.

“Zen” and “K12”

At AMD, Mr. Keller was responsible for development of the company’s next-generation x86 and ARM micro-architectures, including “Zen”, “Zen+”, “K12” and others. AMD claims that microprocessors based on its “Zen” cores will offer 40 per cent higher instructions per clock performance compared to “Excavator” x86 cores.

While a micro-architecture is crucially important for success of multiple generations of products, relatively small groups of people design it. Moreover, it does not take too long to create a modern CPU micro-architecture on a high-level. What does take a long time is implementation of actual hardware blocks inside processor cores (instruction fetchers/decoders, schedulers, arithmetic logic units, floating point units, etc.), development of various “un-core” components (pre-fetchers, internal interconnections, caches, memory controllers, interfaces, etc.), design and implementation of actual chips based on the architecture and hardware blocks. As a result, CPUs that are sold today are powered by micro-architectures developed many years ago.

“Architecture decisions are many years in advance of products,” explained the representative for AMD. “As you may remember, he was a primary architect on K8. We launched that product in 2003 and he had left AMD in 1999.”

amd_ati_compass_atyt_strategy_bg

The development of “Zen” (znver1) and “Zen+” (znver2) micro-architectures – which AMD has disclosed – has been completed a long time ago. At this point Mr. Keller’s CPU architecture design team may be finalizing the third iteration of Zen (znver3) or starting high-level design of the fourth iteration of Zen (znver4). Development of the “K12” and the “K12+” micro-architectures, which share a lot of innovations with “Zen”, has been finished too. It is highly likely that the departure of Mr. Keller will not significantly affect AMD’s products due in 2016 – 2018, all products based on “Zen” and “K12” cores will see the light of day.

“We have a multi-generation roadmap in place to further enhance and improve the core well into the future,” said Mr. Prairie. “Our focus is on high-performance, scalable, 64-bit x86 and ARM cores.”

amd_opteron_2016_2017

CPU development pipeline

Throughout its history, Advanced Micro Devices has developed a number of breakthrough micro-architectures and technologies that were years ahead of what their competitors offered at the time. Unfortunately, AMD did not always have enough resources to pursue new opportunities. So, when AMD decided to design two micro-architectures instead of one in 2005 – 2006, it was a risky decision, which eventually negatively affected the whole CPU development pipeline at the company. Fortunately, the pipeline has been fixed by now, thanks to Mark Papermaster and Jim Keller.

In the past, AMD had multiple CPU architecture development teams based in different locations (including Sunnyvale, California; Boxborough, Massachusetts; Fort Collins, Colorado, etc.). Different teams designed and enhanced different micro-architectures and were very dedicated to their work. While this seemed to make sense in the 2000s, when the company designed only microprocessors, it would not work nowadays. As a result, Rory Read and Mark Papermaster, who joined the company in 2011 as the chief executive officer and the chief technology officer, decided to cease development of low-power/low-cost x86 cores (known as “Cats”, e.g., “Bobcat”, Jaguar”, “Puma”) and focus on high-performance scalable micro-architectures instead. Moreover, Mr. Papermaster, who worked on design of microprocessors at IBM from 1991 to 2006, eventually unified all CPU architecture development teams into one, creating a large pool of talent ready to address various challenges.

amd_fusion_semi_custon_chip_universe

Mark Papermaster re-assigned one of the teams (presumably the one located in Boxborough, Massachusetts) to finish the “Bulldozer” micro-architecture enhancements (that work was probably completed in ~2013 and then the team joined the global CPU architecture development group), making resources of the California-based CPU engineering team available to Jim Keller, who joined AMD in August, 2012.

Today, engineers at different locations work on the same projects, which should speed up development of high-performance x86 and ARM cores. For example, people at Fort Collins, Colorado, are working on energy-efficiency of AMD's future micro-architectures (e.g., “Zen”) and chip designs. AMD’s globalized micro-architecture and microprocessor development groups should be generally more agile and flexible than dedicated teams back in the days. As a result, it is logical to expect AMD to create products faster going forward. Moreover, thanks to Jim Keller’s contribution, those chips are expected to be rather competitive on the micro-architecture level.

Fixing CPU development pipeline at AMD was a key thing for the company’s future success. The strategic decision for this was made by Mark Papermaster, who handled a lot of organizational issues too. However, it was Jim Keller, who created a working mechanism that is ready to produce competitive micro-architectures for processors.

Discuss on our Facebook page, HERE.

KitGuru Says: Contemporary microprocessors contain billions of elements. Modern CPU micro-architectures are extremely complex and can only be developed by groups of talented people working together. Nonetheless, Jim Keller is a true legend in the world of microprocessors. Throughout his career, he managed design of so many successful products that without any doubts he is a brilliant CPU architect. It is a little sad to see him leaving AMD, but if you take a look at his career, he has never spent more than several years at one chipmaker. In fact, it was a matter of time for him to leave AMD. Fortunately, there is now a working global CPU micro-architecture development group at AMD, which can continue what Mr. Keller started. The main intrigue about Jim Keller now is what is next for him. Meanwhile, AMD's processor R&D is in good hands for now.

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Samsung expects graphics cards with 6144-bit bus, 48GB of HBM memory onboard https://www.kitguru.net/components/graphic-cards/anton-shilov/samsung-expects-graphics-cards-with-6144-bit-bus-48gb-of-hbm-memory-onboard/ https://www.kitguru.net/components/graphic-cards/anton-shilov/samsung-expects-graphics-cards-with-6144-bit-bus-48gb-of-hbm-memory-onboard/#comments Fri, 21 Aug 2015 15:56:38 +0000 http://www.kitguru.net/?p=264471 Samsung Electronics indicated that it plans to start volume production of high-bandwidth memory (HBM) next year at the Intel Developer Forum this week. At the trade-show, the company revealed its current vision and expectations concerning HBM. Samsung foresees that eventually high-performance applications (such as GPUs) could feature up to six HBM devices to enable unprecedented …

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Samsung Electronics indicated that it plans to start volume production of high-bandwidth memory (HBM) next year at the Intel Developer Forum this week. At the trade-show, the company revealed its current vision and expectations concerning HBM. Samsung foresees that eventually high-performance applications (such as GPUs) could feature up to six HBM devices to enable unprecedented capacities and bandwidth.

As it appears, Samsung plans to skip the first-generation HBM memory and will only manufacture products compliant with the second-generation HBM specification, which offers higher densities and clock-rates. Such approach will let Samsung to address broader market segments with its HBM offerings. Right now HBM can only be used on consumer graphics cards and certain highly-custom products, but HBM2 will enable professional and high-performance computing GPU-based solutions, which require a lot of memory onboard.

Samsung is currently working on multiple HBM packages featuring two (2Hi stack), four (4Hi) and eight (8Hi) 8Gb memory devices on a base logic die with 1024-bit interface, according to a slide that the company demonstrated at the IDF (which was published by ComputerBase.de). Maximum data-rates of Samsung’s HBM products will be 2Gb/s, which will support up to 256GB/s of bandwidth per chip.

samsung_hbm_plans

Samsung believes that HBM memory will enable it to create a variety of chip offerings targeting different market segments. Designers of logic chips (GPUs, APUs, network processors, etc.) will be able to integrate the right amount of HBM controllers into their chips in order to target different applications. At present AMD’s “Fiji” graphics processing unit supports up to four HBM stacks over its 4096-bit interface. Eventually, logic chips could accommodate more HBM controllers and expand interface width to unprecedented 6144-bit, according to Samsung Electronics.

For example, a mainstream graphics card could use just one 2Hi HBM chip to accommodate a 2GB frame-buffer with 256GB/s bandwidth. More advanced graphics adapters for consumers and creative professionals could feature four 2Hi or four 4Hi HBM stacks that provide up to 1TB/s of bandwidth as well as 8GB, 16GB or 32GB of memory. Accelerators for high-performance computing as well as ultra-high-end GPU offerings will support six HBM stacks, thus enabling cards with 12GB, 24GB or 48GB of onboard memory with 1.5TB/s bandwidth.

amd_radeon_fiji_gpu

So far, neither AMD nor Nvidia have demonstrated even hypothetical product implementations (which are used to showcase potential future uses of technologies) of GPU-based solutions featuring six HBM memory chips. Intel Corp.’s Xeon Phi co-processors use HMC [hybrid memory cube] DRAMs as “near memory” and are not expected to support HBM any time soon.

nvidia_pascal_module

Samsung expects HBM memory to be used for consumer graphics cards and high-performance computing accelerators based on AMD “Arctic Islands” and Nvidia “Pascal” graphics processors next year. Sometimes in 2017, network products will also take advantage of the new memory type. Three years from now other applications could employ HBM, according to Samsung.

The world’s largest maker of dynamic random access memory (DRAM) did not unveil any details about its actual HBM chips (capacities, clock-rates, etc.), but expect a family of products with different densities and frequencies.

Samsung did not disclose which process technology it will use to manufacture HBM.

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KitGuru Says: Samsung is definitely not the first to offer HBM, but it is pretty clear that the company takes the new type of memory very seriously. What is interesting is that the company decided not to give a glimpse into the future of HBM, which indicates that the third-generation HBM is still a work in progress.

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AMD readies three new GPUs: Greenland, Baffin and Ellesmere https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-readies-three-new-gpus-for-2016-greenland-baffin-and-ellesmere/ https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-readies-three-new-gpus-for-2016-greenland-baffin-and-ellesmere/#comments Thu, 20 Aug 2015 21:27:02 +0000 http://www.kitguru.net/?p=264345 In the recent years, Advanced Micro Devices has reduced the amount of new graphics processors it releases per annum, which lead to massive erosion of its market share and revenue. While the company hopes that its latest product lineup will help it to regain some of the lost share and improve earnings, the firm pins …

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In the recent years, Advanced Micro Devices has reduced the amount of new graphics processors it releases per annum, which lead to massive erosion of its market share and revenue. While the company hopes that its latest product lineup will help it to regain some of the lost share and improve earnings, the firm pins considerably more hopes on an all-new family of products that will be released in 2016.

AMD’s code-named “Arctic Islands” family of products will include three brand-new chips – “Greenland”, “Baffin” and “Ellesmere” – a source with knowledge of AMD plans said. The “Greenland” will be the new flagship offering for performance enthusiasts, whereas the “Baffin” and “Ellesmere” will target other market segments, such as high-end and mainstream. It is unclear whether the “Arctic Islands” family will take in any existing products, but it is possible that AMD may address certain markets with previous-gen products.

amd_radeon_artwork_angle_new

“Greenland” will be AMD’s first graphics processing unit based on the all-new micro-architecture, which development began a little more than two years ago. While the architecture is currently known as another iteration of GCN, the new ISA [instruction set architecture] will be so considerably different compared to the existing GCN that it has every right to be called “post-GCN”, the source said. It is likely that the “Greenland” will retain layout of the contemporary AMD Radeon graphics processing units, but there will be significant changes in on the deeper level.

The only official thing currently known about the new architecture, which Mark Papermaster, chief technology officer of AMD, calls the next iteration of GCN, is that it is projected to be two times more energy efficient compared to the current GCN. Essentially, this means means major performance enhancements on the ISA level. Thanks to the fact that the “Greenland” graphics processing unit will be made using either 14nm or 16nm FinFET process technology, expect it to feature considerably larger number of stream processors than “Fiji”.

amd_radeon_fiji_gpu

The “Greenland” graphics processor will rely on the second-generation high-bandwidth memory (HBM), so expect ultra-high-end graphics cards and professional solutions with up to 32GB of DRAM onboard with bandwidth of up to 1TB/s. Consumer-class “Greenland”-based products will likely come with 8GB – 16GB of memory. Due to usage of HBM, expect the “Greenland” chip and upcoming graphics cards on its base to resemble the currently available AMD Radeon R9 Fury-series adapters.

The number of transistors inside the “Greenland” as well as its die size are unknown. Since 14nm/16nm FinFET manufacturing technologies have considerably (up to 90 per cent) higher transistor density than contemporary TSMC’s 28nm fabrication process, it is logical to expect that the new flagship product will feature 15 – 18 billion of elements if it retains around 600mm² die size from the “Fiji”.

It is believed that AMD has already taped-out its “Greenland” graphics processing unit and is about to get the first silicon in the coming weeks.

amd_radeon_shop-home-component

Not a lot of information is known about the “Baffin” and the “Ellesmere”. The source stressed that both GPUs are brand-new and will be designed from scratch. Since the “Baffin” and the “Ellesmere” are named after bigger and smaller islands in Canada, it is likely that the former is a mainstream graphics chip with moderate die size, whereas the former is a small entry-level GPU. AMD began to work on “Ellesmere” about a year ago.

Expect AMD to begin talking about its next-generation graphics architecture in the coming months.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: As it traditionally happens, everything looks very good on paper. If AMD manages to release three brand new chips within a reasonable amount of time in 2016 and the chips will be competitive against Nvidia’s, then it has all the chances to win back market share. However, one should keep in mind that the “next GCN” or the “post-GCN” will not compete against Nvidia’s “Maxwell”, but will have to compete against Nvidia’s “Pascal”, which promises to be very powerful. As a result, expect 2016 is going to be an interesting year for the GPUs…

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AMD is researching multi-core ‘exascale heterogeneous processor’ https://www.kitguru.net/components/cpu/anton-shilov/amd-is-researching-exascale-heterogeneous-processor-with-16-zen-cores-gpu-and-hbm/ https://www.kitguru.net/components/cpu/anton-shilov/amd-is-researching-exascale-heterogeneous-processor-with-16-zen-cores-gpu-and-hbm/#respond Mon, 03 Aug 2015 21:53:39 +0000 http://www.kitguru.net/?p=261901 Advanced Micro Devices has confirmed that it is researching a multi-core accelerated processing unit based on “Zen” micro-architecture, which will eventually power supercomputers with extreme performance. At present the company is only considering a concept design and it is unclear when AMD decides to actually develop such processor. AMD, just like many other leading designers …

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Advanced Micro Devices has confirmed that it is researching a multi-core accelerated processing unit based on “Zen” micro-architecture, which will eventually power supercomputers with extreme performance. At present the company is only considering a concept design and it is unclear when AMD decides to actually develop such processor.

AMD, just like many other leading designers of chips, believes that supercomputers with exascale-class performance will have to use hybrid processor that feature both general-purpose cores as well as multiple stream processors found in graphics processing units. AMD has been promoting the idea of hybrid accelerated processing units since 2006, hence, its vision regarding “exascale heterogeneous processor”, which it outlined in a paper published by IEEE, is not surprising.

“To make fully realize the capabilities of the GPU, we envision exascale compute nodes comprised of integrated CPUs and GPUs (i.e., accelerated processing units or APUs) along with the hardware and software support to enable scientists to effectively run their scientific experiments on an exascale system,” the paper reads. “We discuss the hardware and software challenges in building a heterogeneous exascale system, and we describe on-going research efforts at AMD to realize our exascale vision.”

AMD-exascale

BitsAndChips web-site reports that the concept of EHP [exascale heterogeneous processor] features 16 or even 32 general-purpose cores based on “Zen” architecture, stream processors based on the next iteration of GCN [graphics core next] architecture as well as HBM [high bandwidth memory].

Earlier this year first details about 16-core APU leaked. AMD’s EHP for supercomputers is expected to feature 16 x86 “Zen” cores with two-way simultaneous multi-threading technology and 512KB L2 cache per core, 32MB L3 cache as well as a new-generation “Greenland” graphics engine with ½ double precision compute rate. The exascale heterogenerous processor is also projected to feature a quad-channel DDR4 memory controller with enhanced ECC capabilities that supports up to 256GB of memory per channel, 64 lanes of PCI Express 3.0 that can be used for SATA Express, integrated SATA, 1GbE, USB as well as various legacy interfaces. The APU is also expected to feature on-package 16GB of HBM2 memory with 512GB/s or higher bandwidth. It is assumed that the chip will hit the market in 2017, but AMD has never confirmed this.

AMD confirmed development of a datacenter APU earlier this year, but has never revealed its specifications. Keeping in mind that initial processors based on “Zen” micro-architecture will be made using 14nm FinFET process technology and will not feature more than eight cores, chips with 16 or 32 cores will likely be manufactured using 10nm FinFET fabrication process sometimes in 2018, at the earliest.

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KitGuru Says: The new paper released by AMD formally confirms what the company has been talking about for years. It does not mean that the company is actually developing an APU with 32 x86 cores and a GPU engine. However it does confirm the company’s vision regarding the future of server chips.

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AMD: We have taped out our first FinFET products https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-we-have-taped-out-our-first-finfet-products/ https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-we-have-taped-out-our-first-finfet-products/#comments Fri, 17 Jul 2015 02:48:59 +0000 http://www.kitguru.net/?p=259448 Advanced Micro Devices said on Thursday that it had taped out its first products, which will be made using a FinFET process technology. While AMD does not reveal which products it had taped out, it is highly-likely that one of them is a highly-anticipated microprocessor based on “Zen” micro-architecture. “We have actually just taped-out our …

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Advanced Micro Devices said on Thursday that it had taped out its first products, which will be made using a FinFET process technology. While AMD does not reveal which products it had taped out, it is highly-likely that one of them is a highly-anticipated microprocessor based on “Zen” micro-architecture.

“We have actually just taped-out our first couple of FinFET designs,” said Lisa Su, chief executive officer of Advanced Micro Devices, during the company’s earnings conference call with investors and financial analysts.

Ms. Su did not elaborate which of the future designs the company had taped out and when exactly this happened. Nonetheless, two tape-outs mean that the company has managed to successfully design its first products with FinFET transistors. Design of an advanced microprocessor that will be made using a FinFET process technology costs north from $150 million without the cost of photomasks needed for production. Therefore, the tape-out means that the vast majority of investments in these two chips have been made.

amd_fusion_chip_logo_processor

Tape-out is the final stage of the design cycle of an integrated circuit, the point at which the artwork of the IC is sent to a maker of photomasks. Once the set of photolithographic masks is ready and verified, it is sent to a contract manufacturer of the chip, which produces the first working samples of the chip. It may take up to several weeks to prepare a mask-set. Production cycle of a complex FinFET processor is around 90 days from wafer start to chip delivery. As a result, if AMD taped out its first FinFET chips in June, then the company will get the first samples of its products in September.

Mass production of chips nowadays starts between nine and twelve months after the initial tape-out. Therefore, if AMD managed to tape-out its chips last month, then it is on-track to start their high-volume production next June or a bit earlier and release its first products made using a FinFET process technology in late Q3 or early Q4 2016.

amd_graphics_leadership_1

AMD does not disclose which of its FinFET chips it has taped-out. Based on official and unofficial information, it is highly likely that the first AMD products to be made using a FinFET fabrication process will be the code-named “Summit Ridge” central processing unit with up to eight “Zen” cores as well as the code-named “Greenland” graphics processing unit based on the next iteration of the GCN [graphics core next] architecture. Over time all AMD products will be made using FinFET process technologies. The “Summit Ridge” will be used for next-generation AMD Opteron processors for servers as well as for AMD FX processors for desktops.

“We will be bringing different parts of the product line into FinFET at different points in time,” said Ms. Su. “I think what we have said is graphics [processors] will certainly utilize FinFETs as well as our new Zen processors and so they will roll out over the quarters in 2016.”

It is noteworthy that AMD still does not want to disclose its manufacturing partner for FinFET process technologies in 2016.

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KitGuru Says: It is a long time before we will see the first FinFET products from AMD on the market. However, it is great to see that the company has finished its first two FinFET designs. The biggest part of the work is over for the two FinFET-based products, now AMD needs to execute and release them in time.

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AMD reportedly has priority supply agreement regarding HBM, HBM2 https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-reportedly-has-priority-supply-agreement-regarding-hbm-hbm2/ https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-reportedly-has-priority-supply-agreement-regarding-hbm-hbm2/#comments Tue, 14 Jul 2015 10:55:38 +0000 http://www.kitguru.net/?p=258850 The first-generation high-bandwidth memory provides extreme performance, but is clearly not perfect for high-end graphics cards due to capacity limitations. A good news is that second-gen high-bandwidth memory is on the way and is due in 2016. Advanced Micro Devices may get it faster and in higher volumes than its arch-rival Nvidia Corp. The only …

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The first-generation high-bandwidth memory provides extreme performance, but is clearly not perfect for high-end graphics cards due to capacity limitations. A good news is that second-gen high-bandwidth memory is on the way and is due in 2016. Advanced Micro Devices may get it faster and in higher volumes than its arch-rival Nvidia Corp. The only question is when exactly HBM2 is set to be available.

HBM2 to solve HBM's problems

One of the key drawbacks of the first-generation high-bandwidth memory (HBM) is its low capacity. At present, it is impossible to install more than 4GB of HBM on a single-GPU graphics card, which was not a good news for AMD’s Radeon R9 Fury-series adapters. SK Hynix, AMD, JEDEC and a number of other industry players are working on the second-gen high-bandwidth memory (HBM 2), which will solve a lot of problems, including capacity-related. Moreover, Advanced Micro Devices may benefit from priority supply agreement it reportedly has with SK Hynix.

sk_hynix_hbm_dram_2

The first-generation HBM (HBM1) stacks four DRAM dies with two 128-bit channels per die on a base logic die, creating a memory device with a 1024-bit interface. Each channel supports 1Gb capacities (2Gb per die), features 8 banks and can operate at 1Gb/s data-rate (1GHz effective DDR clock-rate). As a result, each HBM 4Hi stack (4 high stack) package can provide 1GB capacity and 128GB/s memory bandwidth. The second-generation HBM (HBM2) utilizes 8Gb dies with two 128-bit channels featuring 16 banks and sporting up to 2Gb/s data-rates (2GHz effective DDR frequency). The architecture of the HBM2 will let manufacturers built not only 4Hi stack (4 high stack) packages, but also 2Hi stack and 8Hi stack devices. As a result, memory producers will be able to assemble HBM2 memory chips with up to 8GB capacity (8Hi stack) and up to 256GB/s bandwidth (2Gb/s data rate, 1024-bit bus). Architectural advantages of HBM2 will allow GPU developers to use it not only for ultra-high-end applications with 4096-bit memory bus, but also for adapters that do not require extreme performance.

The industry needs HBM2

Advanced Micro Devices has already announced that it would use HBM memory going forward for a broad range of its ICs [integrated circuits], including graphics processing units and accelerated processing units. Right now, the company is working on its all-new family of graphics processing units based on the next iteration of GCN architecture with increased power efficiency and performance. AMD’s next high-end GPU code-named “Greenland” will be made using 16nm or 14nm FinFET process technology, which will help AMD to considerably increase transistor and stream processor counts compared to the code-named “Fiji” (AMD Radeon R9 Fury-series). As a result, “Greenland” will require more advanced memory and AMD plans to use HBM2 for it.

nvidia_pascal_module

Nvidia will also produce its code-named “Pascal” chips using TSMC's 16nm FinFET process technology and will also dramatically boost transistor count vs. existing graphics processing unit. It is expected that Nvidia's code-named GP100 chip will also need a high-end memory sub-system, presumably based on HBM2. At least, Nvidia officially revealed plans to use “3D memory” with “Pascal”.

Supply agreement

Since AMD has been a key developer of both HBM and HBM2, there is a contract in place that gives AMD priorities in terms of supply, according to WccfTech. While the terms of the agreement are unknown, typically such agreements mean that SK Hynix has to meet AMD’s requirements first and only then ship its chips to other customers. Theoretically, this could give AMD “an edge against its main rival, Nvidia, going into the next generation of GPUs featuring second-generation HBM technology.”

Supply agreements are usually signed in a bid to ensure priority treatment, high volumes and good prices. For example, Apple usually signs supply agreements to ensure that it gets what it needs from its suppliers and at low costs. AMD's share in the GPU market is pretty low these days and it may simply not need a lot of HBM2 chips for its launch next year.

HBM2 is still not quite there yet

Earlier this year SK Hynix demonstrated a 300mm wafer with HBM2 chips on it, which is an indicator that the company is testing such products internally, but this does not give any idea about when the HBM2 is ready for mass production.

At present SK Hynix uses 29nm manufacturing technology to manufacture HBM memory chips. According to roadmap leaked by SemiAccurate some time ago, the company plans to use its 21nm fabrication process to produce HBM2 sometimes in Q1 or Q2 2016. SK Hynix’s transition to 21nm is generally considered to be slow, which means that actual launch timeframe may be slightly delayed.

sk_hynix_tsv_roadmap_hbm

SK Hynix thoroughly lists all of its products – current, future and even some EOLed – in its catalogue that is updated every quarter. It is well known, which of SK Hynix’s chips are available, which will be available in Q1 or Q2 2016 and which will be sampled in Q1 2016. At present, SK Hynix does not list HBM2 anywhere, which may be a matter of trade secrets. However, back in 2014, the company did list first-gen HBM chips as “sampling” in Q3 and as “available” in Q4. At the present time, nothing is known about availability or sampling of HBM2 chips, which may indicate that their availability timeframe is not exactly clear.

AMD and SK Hynix did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: Without any doubts, HBM may have certain teething problems, but nobody is talking about them publicly because of commercial reasons. Before the problems get solved, it is unlikely that SK Hynix or other producers of memory start to manufacture HBM2 in higher volumes.

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AMD ‘Raven Ridge’: Mainstream APU with ‘Zen’ cores due in 2017 https://www.kitguru.net/components/cpu/anton-shilov/amd-raven-ridge-mainstream-apu-with-zen-cores-due-in-2017/ https://www.kitguru.net/components/cpu/anton-shilov/amd-raven-ridge-mainstream-apu-with-zen-cores-due-in-2017/#comments Wed, 24 Jun 2015 12:04:11 +0000 http://www.kitguru.net/?p=255966 Advanced Micro Devices will release microprocessors based on “Zen” cores only for high-end desktop computers next year. Mainstream PCs will get the company’s new micro-architecture in 2017, when the company rolls-out its “Raven Ridge” accelerated processing units, according to a media report. Next year AMD will offer its “Bristol Ridge” accelerated processing units for mainstream …

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Advanced Micro Devices will release microprocessors based on “Zen” cores only for high-end desktop computers next year. Mainstream PCs will get the company’s new micro-architecture in 2017, when the company rolls-out its “Raven Ridge” accelerated processing units, according to a media report.

Next year AMD will offer its “Bristol Ridge” accelerated processing units for mainstream PCs with up to four “Excavator” cores and Radeon graphics with GCN 1.2 architecture. The chip will be based on the “Carrizo” architecture, but will run at higher clock-rates and will this feature considerably higher thermal design power. Since AMD’s “Bristol Ridge” will essentially use current-gen technologies, it will offer 10 – 15 per cent performance improvement compared to existing “Kaveri” APUs in the best case scenario.

AMD will release considerably more advanced “Raven Ridge” APU in 2017, according to AMD’s roadmap, which was revealed by BenchLife. Nothing particular is known about the chip right now, except the fact that it will be based on “Zen” micro-architecture and will thus offer considerably – by around 40 per cent – higher performance compared to existing APUs at the same clock-rates.

amd_client_platform_roadmap

AMD’s “Summit Ridge”, “Bristol Ridge” and “Raven Ridge” processors will all use AM4 form-factor (previously known as FM3) and DDR4 memory. Platforms for the new central processing units and accelerated processing units will be based on the code-named “Promontory” chipsets.

It is noteworthy that according to the published slide AMD does not have plans to introduce microprocessors based on the “Zen+” micro-architecture in 2017.

AMD did not comment on the news-story.

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KitGuru Says: Since “Raven Ridge” chips will likely ship only in mid-2017 – two years from now – AMD’s positions in the market of mainstream microprocessors will not change. Even though Intel Corp. decided not to release its 10nm chips in 2016, even its 14nm code-named “Kaby Lake” offering will remain very competitive against AMD’s APUs.

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UMC: 14nm FinFET technology will be ready for tape outs by year end https://www.kitguru.net/components/anton-shilov/umc-14nm-finfet-technology-will-be-ready-for-tape-outs-by-year-end/ https://www.kitguru.net/components/anton-shilov/umc-14nm-finfet-technology-will-be-ready-for-tape-outs-by-year-end/#comments Wed, 24 Jun 2015 07:07:24 +0000 http://www.kitguru.net/?p=255903 United Microelectronics Corp. said on Tuesday that it has successfully taped out a test chip from ARM using its 14nm FinFET fabrication technology. The company also revealed that the new manufacturing process will be ready for customer tape outs by the end of the year. UMC and ARM recently taped out a process qualification vehicle …

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United Microelectronics Corp. said on Tuesday that it has successfully taped out a test chip from ARM using its 14nm FinFET fabrication technology. The company also revealed that the new manufacturing process will be ready for customer tape outs by the end of the year.

UMC and ARM recently taped out a process qualification vehicle (PQV) test chip on UMC's 14nm FinFET technology. The test chip is specifically designed to validate an ARM Cortex-A family core on a new fabrication process. Customers of UMC and ARM can license validated physical building blocks from ARM, integrate them into their designs and produce them at UMC.

The validation of the UMC 14nm FinFET manufacturing process begins the enablement process for the rest of IP ecosystem needed for UMC's FinFET technology, including the need for foundation IP and ARM processor physical design.

semiconductor_umc_wafers

“We are highly encouraged by the test chip tape-out of a Cortex-A family core using UMC's 14nm FinFET process,” said Will Abbey, general manager of physical design group at ARM. “ARM will continue its close partnership with UMC during the development of this advanced process node.”

The production of the test chip also validates feasibility of UMC’s 14nm fabrication process. Up to now the contract maker of semiconductors only produced 128MB SRAM chips using its FinFET technology. UMC expects its 14nm process to be ready for customer tape-out by late 2015.

Discuss on our Facebook page, HERE.

KitGuru Says: It is interesting to note that UMC decided to renamed its FinFET process once again. Earlier this year it called the process as “16nm”, but this time the company claims that the technology features 14nm elements.

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Nvidia and Samsung still cannot finalize chip manufacturing deal https://www.kitguru.net/components/graphic-cards/anton-shilov/nvidia-and-samsung-still-cannot-finalize-chip-manufacturing-deal/ https://www.kitguru.net/components/graphic-cards/anton-shilov/nvidia-and-samsung-still-cannot-finalize-chip-manufacturing-deal/#comments Sat, 20 Jun 2015 13:23:37 +0000 http://www.kitguru.net/?p=255534 Earlier this year Nvidia Corp. officially named Samsung Electronics its manufacturing partner. However, as it appears, the companies still have not signed any actual deals because negotiations are proceeding with difficulties. The consequence of prolonged negotiations could result in later-than-expected release of Samsung-made Nvidia chips. Nvidia wants Samsung Electronics to guarantee certain level of yield …

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Earlier this year Nvidia Corp. officially named Samsung Electronics its manufacturing partner. However, as it appears, the companies still have not signed any actual deals because negotiations are proceeding with difficulties. The consequence of prolonged negotiations could result in later-than-expected release of Samsung-made Nvidia chips.

Nvidia wants Samsung Electronics to guarantee certain level of yield rate at 14nm for its graphics processing units, reports BusinessKorea. The yield rate is as a condition of a provisional contract with Samsung Electronics, the web-site emphasizes. The negotiations are proceeding with difficulties because Samsung’s 14nm low-power plus (14LPP) fabrication process is still not really mature.

nvidia_tegra_x1_cut

Theoretically, engineering and business decision operations are isolated. Nvidia’s chip designers are working on chips to be made by Samsung, whereas other people are negotiating over pricing. If talks take too much time, then the start of volume production may be delayed, but since Nvidia will need Samsung’s production services only in 2016, it still has weeks or even months to negotiate a deal.

At present, Samsung Foundry is the only contract maker of semiconductors that produces chips using 14nm FinFET process technology in high volume. Taiwan Semiconductor Manufacturing Co. is expected to start mass production of chips using its 16nm FinFET process this month. Intel Corp.’s foundry division offers 14nm FinFET services to select companies and, based on rumours, not everyone is happy with the technology.

According to unofficial information, Nvidia recently taped out its first code-named GP100 graphics processing unit, which belongs to the “Pascal” family of products. The chip is set to be produced using TSMC’s 16nm FinFET+ (CLN16FF+) fabrication process.

samsung_semiconductor_foundry_chip_production_4

One analyst believes that Nvidia plans to use its contract with Samsung’s not only to get access to leading-edge fabrication processes and to ensure high-volume supply of chips, but also in order to cut-down its costs. In fact, a number of fabless semiconductor designers are believed to be using contracts with Samsung as a leverage in their negotiations with TSMC over pricing.

“We believe that Nvidia has a second source for foundry wafers in Samsung, outside of TSMC,” said Doug Freedman, an analyst with RBC Capital Markets, in a note to clients. “While it may be a small part of the wafer supply today, it should create a tailwind for [gross margin percentage] going forward as we believe that non-TSMC wafers can be purchased at as much as 10% below present cost levels.”

Nvidia and Samsung did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: In fact, chip designers and foundries are always negotiating over yields and costs, which is a normal process. No actual conclusions can be made because of prolonged talks.

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AMD set to release first ‘Zen’-based microprocessors in late 2016 – document https://www.kitguru.net/components/cpu/anton-shilov/amd-set-to-release-first-zen-based-microprocessors-in-late-2016-document/ https://www.kitguru.net/components/cpu/anton-shilov/amd-set-to-release-first-zen-based-microprocessors-in-late-2016-document/#comments Fri, 12 Jun 2015 19:28:26 +0000 http://www.kitguru.net/?p=254276 While Advanced Micro Devices’ next-generation micro-architecture known as “Zen” looks very impressive on paper, it will not hit the market any time soon. In fact, AMD plans to release the first microprocessors featuring the new cores only in late 2016, according to a document published by a web-site. AMD’s first “Zen”-based central processing units code-named …

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While Advanced Micro Devices’ next-generation micro-architecture known as “Zen” looks very impressive on paper, it will not hit the market any time soon. In fact, AMD plans to release the first microprocessors featuring the new cores only in late 2016, according to a document published by a web-site.

AMD’s first “Zen”-based central processing units code-named “Summit Ridge” will only become available in October, 2016, according to AMD 2016 desktop platform schedule* published by BenchLife. The confidential document was presented to AMD’s partners on the 27th of March, 2015, and may contain certain inaccuracies. For example, the document calls AMD’s forthcoming desktop socket as “FM3”, whereas AMD’s official name revealed in May is “AM4”.

If the schedule is correct and up-to-date, then AMD is finalizing design of its “Summit Ridge” chip right now and still does not have fully-functional samples of the processor.

amd_platform_samples_schedules_zen_summit_ridge

AMD expects to send the first engineering samples (ES) of the “Summit Ridge” central processing units to its partners in April, 2016. Engineering samples are usually fully-functional A1 revision chips that may run at lower clock-rates than the final products.

The A2 production candidate (PC) “Summit Ridge” processors that run at designated clock-rates and support all features are expected to ship to AMD’s partners in July, 2016. By September, 2016, AMD will ship A2 revision production ready (PR) processors with all the markings on them. The first central processing units featuring “Zen” cores will be introduced in October, 2016.

Nowadays high-volume production of chips starts between nine and twelve months after the initial tape-out. The A2 revision is usually the first commercial version of the chip for AMD. If AMD starts to produce its “Summit Ridge” chips in volume in July, 2016, it means that the company is finalizing its design right now and will tape the chip out in the coming weeks.

amd_fusion_chip_logo_processor

Based on unofficial information, AMD’s “Summit Ridge” processor has up to eight “Zen” cores with 512KB level two cache per core, up to 16MB of unified level-three cache, a dual-channel DDR4 memory controller, integrated PCI Express 3.0 x16 bus to connect to graphics cards, built-in PCIe 3.0 x4 port with NVMe and SATA support to connect storage devices and other input/output technologies. The CPUs are expected to be made using 14nm FinFET process technology (14LPP) at GlobalFoundries.

The authenticity of the document could not be verified, even though it resembles typical AMD’s documents for its partners and contains a number of facts revealed before or after its alleged publication date.

AMD did not comment on the news-story.

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KitGuru Says: As expected, AMD’s “Zen”-based processors will not hit the market during the “back-to-school” season next year and will only be available for holidays. If the chips are significantly better than microprocessors offered by Intel Corp. in the second half of 2016, then AMD will sell a lot of them to enthusiasts, just like it did in 2003, when it released the Athlon 64 3200+ and the Athlon 64 FX-51. However, it also means that high-volume availability of “Summit Ridge” processors will only occur in 2017.

*Note: The image originally published by BenchLife has been altered for better viewing experience.

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AMD’s ‘Zen’ may enable company to be a viable competitor to Intel – analyst https://www.kitguru.net/components/cpu/anton-shilov/amds-zen-may-enable-company-to-be-a-viable-competitor-to-intel-analyst/ https://www.kitguru.net/components/cpu/anton-shilov/amds-zen-may-enable-company-to-be-a-viable-competitor-to-intel-analyst/#comments Fri, 12 Jun 2015 02:17:01 +0000 http://www.kitguru.net/?p=254126 Advanced Micro Devices has not updated its server and high-end desktop microprocessors for well over two years now, which is why market shares of AMD Opteron and AMD FX central processing units are negligible. However, a lot may change next year, when AMD roll-out its next-generation CPUs based on its code-named “Zen” microarchitecture, according to …

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Advanced Micro Devices has not updated its server and high-end desktop microprocessors for well over two years now, which is why market shares of AMD Opteron and AMD FX central processing units are negligible. However, a lot may change next year, when AMD roll-out its next-generation CPUs based on its code-named “Zen” microarchitecture, according to a financial analyst.

“We believe that AMD has a strong design team working on the new ‘Zen’ processor core due out next year,” wrote Gus Richard, an analyst with Northland Capital Markets, in a note to clients, reports Tech Trader Daily. “We believe that this will be a significant improvement over its current product offering, and may enable AMD to once again be a viable second source to Intel in the data center. “

AMD has not revealed a lot of information about “Zen” yet, but what is known is that the company’s upcoming high-performance x86 processor cores offer 40 per cent higher instructions per clock performance compared to “Excavator” x86 cores. This means that AMD’s next-gen central processing units will be 40 per cent faster compared to existing CPUs at the same clock-rate.

amd_zen_performance_advantages_fad
A slide from AMD's official presentation

According to unofficial information, desktop microprocessors based on “Zen” micro-architecture will integrate up to eight cores, whereas server-class chips will feature even more cores. The CPUs are expected to be made using 14nm FinFET process technology at GlobalFoundries.

Since the new AMD Opteron and FX processors are going to hit the market only in the second half of 2016, they will have a significant impact on the company’s revenue and earnings only in 2017. However, Mr. Richard believes that the popularity of AMD’s new server chips will grow rather rapidly because operators of datacenters are willing to invest in hardware that competes against Intel, which is dominating the market.

“We hear that web scale data center operators are frustrated with Intel’s control of server architecture and high prices,” said Mr. Richard.

amd_quad_core_zen
A slide from an alleged presentation of AMD, which has not been published officially

The analyst estimates that sales of AMD Opteron processors based on “Zen” architecture could hit around $1 billion in 2017. Last quarter AMD earned $1.03 billion in total, so addition of “Zen” is projected to be dramatically important for the company.

“We estimate that with roughly 10% market share or $1 billion in datacentre revenue, gross margin in calendar year 2017 would increase to the high 30% range and earnings per share could reach roughly $0.50,” said the analyst. “This would be in line with AMD’s three to five year target model.”

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KitGuru Says: AMD has tremendous troubles with its microprocessors, accelerated processing units and some other products today. If the company executes its “Zen”-related plans well, it may become rather successful. However, one of the problems is that it not enough to offer just one award winning processor. AMD needs to introduce a competitive lineup and then follow-up with equally competitive family a year later. Will AMD be able to do it? Only time will tell!

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AMD: Development of ‘Zen’ CPUs is our largest R&D spending now https://www.kitguru.net/components/cpu/anton-shilov/amd-development-of-zen-processors-is-our-largest-rd-spending-now/ https://www.kitguru.net/components/cpu/anton-shilov/amd-development-of-zen-processors-is-our-largest-rd-spending-now/#comments Fri, 05 Jun 2015 21:14:26 +0000 http://www.kitguru.net/?p=252986 Advanced Micro Devices has been slashing its research and development budgets for a number of quarters in a row now due to decreasing revenues. With limited R&D resources, AMD has to prioritize its spendings. According to chief executive officer of AMD, at present the company spends most of its R&D money on development of upcoming …

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Advanced Micro Devices has been slashing its research and development budgets for a number of quarters in a row now due to decreasing revenues. With limited R&D resources, AMD has to prioritize its spendings. According to chief executive officer of AMD, at present the company spends most of its R&D money on development of upcoming microprocessors based on “Zen” micro-architecture.

AMD spent $232 million on research and development in the first quarter of 2015 (or around 22 per cent of revenue), a 2 per cent increase compared to the previous quarter, but a 17 per cent decrease from the same period a year ago. AMD spends roughly 20 per cent of its revenue on R&D and cannot substantially increase its investments even when it needs to. In a bid to ensure that it can fund crucial projects, AMD cut its SG&A [sales general and administrative] expenses in Q1 2015 to $125 million, down 9 per cent sequentially and 20 per cent year-over-year.

For AMD, the key priority right now is development of high-performance microprocessors, said Lisa Su, chief exec of AMD, in a brief interview with Hardwareluxx web-site at Computex. In fact, high-performance “Zen” processors account for the largest portion of AMD’s R&D investments right now.

amd_zen_performance_advantages_fad

It should be noted that by now AMD has completed development of its “Zen” micro-architecture, engineers of the company are on the finish line with development of “Zen+” and designers of the company should be on the home straight with 2016 chip designs.

Based on AMD’s official roadmaps as well as unofficial information from sources with knowledge of the company’s plans, the chip designer intends to release four products based on “Zen” micro-architecture in 2016. AMD plans to launch new Opteron processors featuring eight, sixteen or even more “Zen” cores; a high-performance desktop chip code-named “Summit Ridge” with up to eight cores; a mainstream accelerated processing unit known as “Bristol Ridge” with four “Zen” cores as well as a low-power APU code-named “Basilisk” with two “Zen” cores inside.

All AMD’s new processors will be made using a FinFET manufacturing technology (presumably, using GlobalFoundries’ 14LPP fabrication process), which means giant spending on design. According to various industry experts, it costs three times more to design a chip with FinFET transistors than to design a chip with planar transistors. Design of a high-end FinFET system-on-chip can cost around $150 million, which is a giant sum for AMD. If the company wants to release two high-end and one mainstream FinFET models next year (note that Opteron uses the same dies as the next-gen FX), it needs $350 – $380 million just to design them. Making those chips material will add mask and tape-out costs.

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In a bid to ensure that “Zen”-based products are available next year, AMD had to make a number of tough decisions. The company postponed release of processors based on its ARMv8-compatible “K12” cores to 2017. Besides, AMD cancelled release of its 20nm system-on-chips – “Amur” and “Nolan” – that belonged to the “Skybridge” family of products.

“The past six or seven months have really given us times to re-look at the [planned] products and [determine] which of the products are going to return on investments because they give us strong market positions and which of the products are not,” said Lisa Su, chief executive officer AMD at the company’s financial analyst day. “I the past I talked about 20nm node that we did some designs on. We have started some initial designs, we have run some silicon, but those parts are probably not going to go into production because we think we can get much more bang for the buck out of FinFET technologies going forward.”

The cancellation of “Amur” and “Nolan” means that AMD will not have anything new to offer for inexpensive tablets based on Microsoft Corp.’s upcoming Windows 10 this fall. The outdated “Mullins” system-on-chip will hardly be able to compete against the latest application processors from Intel and other chip designers. As a result, to fund development of “Zen” processors, AMD had to abandon certain short-term opportunities.

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It is still unclear when AMD plans to release its “Zen” processors. In fact, it is even unknown whether the company has taped out any of “Zen”-based chips.

Mass production of chips starts between nine and twelve months after the initial tape-out. Therefore, if AMD wants its first “Zen” processors to be inside 2016 BTS [back to school] PCs and servers (such machines hit the market in late July or early August), it needs to formally introduce them in mid-2016 and start high-volume production at least 1.5 – 2 months before that (production cycles for FinFET processes are about 90 days). If this is the case, AMD should have taped out the first “Zen”-based products several months ago. If the company plans to release its “Zen” chips in time for 2016 HR [holiday refresh] cycle, then it should tape them out in July '15 (at the latest) and formally introduce them in early fall 2016.

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KitGuru Says: It is good to see that AMD wants to get back into the game with high-performance offerings. Moreover, “Zen” micro-architecture looks very promising from many perspectives and AMD’s plans seem rather ambitious. Unfortunately, without any actual release schedules of AMD’s “Zen” and Intel’s “Cannonlake”, it is hard to make any credible predictions about AMD’s positions on the market of microprocessors next year.

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Nvidia: TSMC is our primary partner for 10nm and 16nm chips https://www.kitguru.net/components/anton-shilov/nvidia-tsmc-is-our-primary-partner-for-10nm-and-16nm-chips/ https://www.kitguru.net/components/anton-shilov/nvidia-tsmc-is-our-primary-partner-for-10nm-and-16nm-chips/#comments Fri, 08 May 2015 11:14:25 +0000 http://www.kitguru.net/?p=248571 Being one of the largest fabless designers of semiconductors in the world, Nvidia Corp. is a very special customer of Taiwan Semiconductor Manufacturing Co. For more than a decade, TSMC has been the primary producer of Nvidia graphics processing units and despite of Nvidia’s recent engagement with Samsung Foundry, TSMC will remain the company’s key …

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Being one of the largest fabless designers of semiconductors in the world, Nvidia Corp. is a very special customer of Taiwan Semiconductor Manufacturing Co. For more than a decade, TSMC has been the primary producer of Nvidia graphics processing units and despite of Nvidia’s recent engagement with Samsung Foundry, TSMC will remain the company’s key manufacturing partner.

“We are constantly evaluating foundry suppliers,” said Jen-Hsun Huang, chief executive officer of Nvidia, during the company’s quarterly conference call with investors and financial analysts. “We largely purchase from TSMC, the vast majority of our wafers we buy from TSMC. We are in 20nm, we are expecting to ramp 16nm. We are deeply engaged with TSMC for many, many nodes to come, including 10nm.”

semiconductor_wafer_cadence_4645_TSMC-Fab3inr008_78-sized

While TSMC remains the world’s largest contract maker of microelectronics, the company is behind Samsung Electronics with its 16nm manufacturing process that employs fin-shaped field-effect transistors (FinFET). Samsung is already producing chips using its 14nm FinFET (14LPE) fabrication technology in high volume, whereas TSMC plans to start making 16nm FinFET chips in Q3 with meaningful revenue contribution starting in the Q4 2015.

At present it is too late for Nvidia to jump ships from 16nm to 14nm (i.e., from TSMC to Samsung). In a bid to get a 14nm FinFET commercial chip from Samsung Electronics in late Q4 2015, Nvidia would have needed to form a design implementation team of around 100-200 engineers a couple of years ago and start to design its ASIC [application specific integrated circuit] in 2013 at the latest. Nvidia would tape out the chip in late 2014 or early 2015, nine to twelve months before the start of mass production. It is unknown when exactly Nvidia decided to use Samsung as a foundry, hence, the company’s 14nm FinFET roadmap and plans are completely unclear.

Officially, Nvidia claims that it does not necessarily need a bleeding-edge manufacturing process to deliver great products.

“There are just so many ways for us to deliver energy efficiency and performance,” said Mr. Huang. “I would not get too obsessed about the process technology all by itself.”.

tsmc_semiconductor_fab14_production

Nonetheless, process technologies are crucial for Nvidia. If Intel or AMD release their new products two or more quarters ahead of Nvidia, the company’s revenue and market share will decrease. Therefore, it makes a great sense for Nvidia to have two foundry partners. However, since it takes a long time to design a modern chip, decisions regarding manufacturing and process technologies have to be made years before such IC [integrated circuit] hits the market. At present Nvidia seems to be downplaying its relationship with Samsung, but no one knows what may happen in the future.

“But we are always looking at new foundry suppliers, and competition keeps everybody sharp,” said the CEO of Nvidia. “But for all intents and purposes, TSMC is our primary partner.”

Discuss on our Facebook page, HERE.

KitGuru Says: “Looking” at new foundry partners and listing one as a supplier in your filing with the Securities and Exchange Commission are two completely different things. In general, it seems that Nvidia is about to start using Samsung as a foundry partner, but it is completely unclear what exactly Samsung will produce for Nvidia. Perhaps, after learning about TSMC’s 20nm focus in late-2011 – early-2012, the company decided to diversify its wafer suppliers. If this is the case, then Nvidia’s next-gen “Pascal” GPUs as well as Tegra system-on-chips will be made by both Samsung and TSMC. Unfortunately, there are not a lot of facts to prove that theory.

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Next-gen AMD platform: processor-direct NVMe storage, USB 3.1, Promontory PCH https://www.kitguru.net/components/cpu/anton-shilov/amds-next-gen-pc-platform-processor-direct-nvme-storage-promontory-pch-usb-3-1/ https://www.kitguru.net/components/cpu/anton-shilov/amds-next-gen-pc-platform-processor-direct-nvme-storage-promontory-pch-usb-3-1/#comments Thu, 07 May 2015 03:20:45 +0000 http://www.kitguru.net/?p=248382 Next year Advanced Micro Devices plans to introduce not only all-new accelerated processing units and central processing units, but also fresh platforms for client PCs. While AMD will do a lot to unify its next-gen platforms, there will still be major differences between systems powered by different microprocessors. AMD’s client platforms next year will rely …

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Next year Advanced Micro Devices plans to introduce not only all-new accelerated processing units and central processing units, but also fresh platforms for client PCs. While AMD will do a lot to unify its next-gen platforms, there will still be major differences between systems powered by different microprocessors.

AMD’s client platforms next year will rely on code-named “Promontory” core-logic that will support various APUs and CPUs from the company, including code-named “Summit Ridge”, “Bristol Ridge” based on “Zen” micro-architecture and other. All next-gen desktop microprocessors from AMD will use unified AM4 packaging and will be compatible with a variety of appropriate mainboards, which will make it easy for system makers to design PCs powered by AMD’s APUs or CPUs.

AMD “Promontory” chipset will be rather feature-rich: it will connect to processors using PCI Express 3.0 x4 bus (up to 4GB/s of bandwidth) and will support USB 3.1, USB 3.0 and USB 2.0 ports; one PCI Express 2.0 general-purpose port for various controllers; Serial ATA-6Gb/s and SATA Express port(s). Since “Promontory” platform controller hub (PCH) will rely on a single 4GB/s interconnection to microprocessor, do not expect it to enable a lot of 10Gb/s USB 3.1 ports along with numerous fast SATA Express ports.

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In fact, the crucial input/output interfaces of AMD’s next-gen client PC platforms will be integrated into APUs and CPUs themselves, according to a block diagram published by BenchLife web-site. AMD’s future microprocessors will built-in processor-direct storage controller: next-gen AMD FX “Summit Ridge” will feature a PCIe 3.0 x4 NVMe port or one PCIe 3.0 x2 along with two Serial ATA 3.0 ports, whereas less advanced “Bristol Ridge” and other chips will support PCIe 3.0 x2 NVMe and two Serial ATA 3.0 ports (or one SATA Express). The upcoming processors will also incorporate four USB 3.0/2.0 ports as well as audio, SPI and LPC interfaces.

What is a bit alarming is that the next-generation AMD FX processors based on “Zen” micro-architecture code-named “Summit Ridge” will support only 16 built-in PCI Express 3.0 lanes for graphics cards, which means that it is not exactly designed for multi-GPU systems with more than two graphics cards.

AMD did not comment on the news-story.

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KitGuru Says: AMD’s next-gen client PC platform for high-performance APUs and CPUs looks pretty competitive by today’s standards. Unfortunately, the “Summit Ridge” + “Promontory” platform does not support a lot of PCI Express 3.0 lanes, which are needed to build multi-GPU systems with multiple SATA Express (PCIe 3.0 x4) SSDs, like the Intel Z170 does, but it fully supports USB 3.1 and ensures maximum performance for NVMe SSDs thanks to processor-direct storage.

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AMD confirms plan to release datacentre-oriented APU in 2016 – 2017 https://www.kitguru.net/components/cpu/anton-shilov/amd-confirms-plan-to-release-datacentre-oriented-apu-in-2016-2017/ https://www.kitguru.net/components/cpu/anton-shilov/amd-confirms-plan-to-release-datacentre-oriented-apu-in-2016-2017/#comments Thu, 07 May 2015 00:16:42 +0000 http://www.kitguru.net/?p=248374 Advanced Micro Devices on Wednesday confirmed development of its first accelerated processing unit for high-performance computing and workstation applications. The chip will integrate many high-performance general-purpose cores as well as high-performance graphics processing unit. The company did not reveal any exact information about the upcoming chip. “In 2016 – 2017 we are [are going to …

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Advanced Micro Devices on Wednesday confirmed development of its first accelerated processing unit for high-performance computing and workstation applications. The chip will integrate many high-performance general-purpose cores as well as high-performance graphics processing unit. The company did not reveal any exact information about the upcoming chip.

“In 2016 – 2017 we are [are going to release] a very high-performance server APU,” said Forrest Norrod, Senior vice president and general manager of enterprise, embedded, and semi-custom (EESC) business group at AMD. “We see one of the key assets for us in the enterprise business – particularly as computational demand continues to increase – as being able to wed [processors and graphics] together. It gives us something that is worth more than the sum of all parts.”

AMD did not reveal any peculiarities of its upcoming APUs for high-performance computing and workstation applications, but indicated that the chips will have multi-TFLOPS compute performance. It is unclear whether the new APUs will offer particularly high performance in supercomputer applications that require double precision FP64 performance, but it is obvious that the APUs will be considerably more powerful than existing chips.

amd_opteron_2016_2017

Previously it was reported that AMD intends to release a multi-TFLOPS APU later this decade to address the market of HPC. Last month a slide, describing a concept of high-performance APU, leaked to the Internet. If the slide is accurate and comes from AMD, then the company’s high-performance APU could integrate up to 16 x86 “Zen” cores with two-way simultaneous multi-threading technology and 512KB L2 cache per core, 32MB L3 cache as well as a new-generation “Greenland” graphics engine with ½ double precision compute rate. The chip is also projected to feature a quad-channel DDR4 memory controller with enhanced ECC capabilities that supports up to 256GB of memory per channel. To speed-up memory bandwidth-demanding applications, the APU could feature on-package 16GB of HBM2 memory with 512GB/s or higher bandwidth.

Keeping in mind that AMD will only begin to roll-out its microprocessors based on “Zen” micro-architecture next year, it is likely that the company will introduce its APU for HPC applications only in 2017. By that time GlobalFoundries’ 14nm FinFET (14nm LPP) process technology that supports things like 2.5D packaging (needed for installation of HBM memory) and a number of enhancements for high-performance devices will get mature and will be suitable for large chips.

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KitGuru Says: High-performance APU seems to be a interesting concept for various HPC workloads. What will be interesting to see is how well such chip could perform in consumer applications. Modern integrated graphics cores easily outstrip cheap low-end graphics cards. However, very powerful APUs could leave behind graphics adapters that cost $150 – $200, something that will disrupt the market of discrete graphics cards in general.

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AMD: Zen is 40% faster than current x86 cores, Zen+ is incoming https://www.kitguru.net/components/cpu/anton-shilov/amd-zen-is-40-faster-than-current-x86-cores-zen-is-incoming/ https://www.kitguru.net/components/cpu/anton-shilov/amd-zen-is-40-faster-than-current-x86-cores-zen-is-incoming/#comments Wed, 06 May 2015 18:33:06 +0000 http://www.kitguru.net/?p=248332 Advanced Micro Devices on Wednesday confirmed that its next-generation high-performance x86 micro-architecture code-named “Zen” will power its leading-edge microprocessors in 2016. The company also revealed that its developers are already working on “Zen+” micro-architecture for its future processors. Mark Papermaster, chief technology officer of AMD, said that “Zen” x86 processor cores offer 40 per cent …

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Advanced Micro Devices on Wednesday confirmed that its next-generation high-performance x86 micro-architecture code-named “Zen” will power its leading-edge microprocessors in 2016. The company also revealed that its developers are already working on “Zen+” micro-architecture for its future processors.

Mark Papermaster, chief technology officer of AMD, said that “Zen” x86 processor cores offer 40 per cent higher instructions per clock performance compared to “Excavator” x86 cores. Essentially, this means that AMD’s next-gen central processing units will be 40 per cent faster compared to existing CPUs at the same clock-rate. According to AMD, the follow-up for “Zen”, currently known as “Zen+” will offer even higher IPC throughput, which means major micro-architectural enhancements.

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“Excavator” is the pinnacle of “Bulldozer” micro-architecture, which was unveiled in 2011 and which has not managed to offer truly competitive performance compared to offerings from AMD’s arch-rival Intel Corp., partly because of its clustered multi-threading architecture that required sharing of floating point units by dual-core CPU modules.

By contrast, “Zen” micro-architecture will permit AMD to build microprocessors with powerful individual cores that support simultaneous multi-threading technology (SMT). SMT lets multiple independent threads to be executed by available resources of one modern CPU core, thus maximizing peak performance.

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The new “Zen” cores will also feature completely redesigned high-bandwidth low-latency inclusive cache sub-system, which should tangibly boost single-thread performance of microprocessors.

40 per cent IPC improvement compared to “Excavator” does not automatically mean that AMD’s future chips will be 40 per cent faster than existing AMD FX microprocessors or AMD A10 accelerated processing units. Since the new chips may run at higher clock-rates, it is possible that they will be considerably faster than AMD’s contemporary CPUs and APUs. Alternatively, if the clock-rates are not high, the new products will show moderate performance improvements compared to today’s offerings.

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As expected, microprocessors powered by “Zen” micro-architecture – which are allegedly code-named “Summit Ridge”, “Bristol Ridge” and “Basilisk” – will be made using 14nm FinFET (14LPP, 14nm low-power plus) process technology at GlobalFoundries.

Discuss on our Facebook page, HERE.

KitGuru Says: 40 per cent IPC performance improvement from generation to generation is absolutely impressive, assuming that this is an average performance improvement. However, it remains to be seen how well will AMD’s future designs perform. In theory, fine designs maximize micro-architectural advantages and we may see FX CPUs from AMD that will compete against Intel’s high-end Core i7 processors in 2016.

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AMD may be developing APUs for TSMC’s 16nm FinFET process technology https://www.kitguru.net/components/anton-shilov/amd-may-be-developing-apus-for-tsmcs-16nm-finfet-process-technology/ https://www.kitguru.net/components/anton-shilov/amd-may-be-developing-apus-for-tsmcs-16nm-finfet-process-technology/#comments Sat, 02 May 2015 06:55:25 +0000 http://www.kitguru.net/?p=247811 Although leaked roadmaps of Advanced Micro Devices indicate that the company’s next year’s accelerated processing units and central processing units will all be made using 14nm FinFET fabrication process at GlobalFoundries, this does not mean that AMD plans to cease using Taiwan Semiconductor Manufacturing Co. as a production partner. For many years AMD has used …

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Although leaked roadmaps of Advanced Micro Devices indicate that the company’s next year’s accelerated processing units and central processing units will all be made using 14nm FinFET fabrication process at GlobalFoundries, this does not mean that AMD plans to cease using Taiwan Semiconductor Manufacturing Co. as a production partner.

For many years AMD has used both GlobalFoundries and TSMC as its key manufacturing partners. GlobalFoundries focused on higher-end APUs and CPUs, whereas TSMC produced GPUs, inexpensive APUs as well as semi-custom APUs. Last year AMD expanded its orders to GlobalFoundries with select GPUs and semi-custom system-on-chips for game consoles. Next year all key APUs and CPUs from AMD, including “Summit Ridge”, “Bristol Ridge”, “Basilisk” and “Styx” will be made using 14nm FinFET process technology at GlobalFoundries.

Taiwan Semiconductor Manufacturing Co. will likely continue to produce at least some graphics processors for AMD next year. Besides, a quick look at activities of AMD engineers at LinkedIn reveals that many people are (or, perhaps, were) working on accelerated processing units to be made using 16nm FinFET process technology at TSMC. The engineers do not reveal code-names of projects they are (or were) working on.

amd_apu_beema_mullins_puma_jaguar_x86_fusion

Many fabless chip designers are not confident of manufacturing capacities and yields of products made using various FinFET manufacturing processes. To mitigate risks associated with yields and production capacities, numerous developers create similar chips for different contract makers of semiconductors so to ensure stable supply.

AMD could take the approach and use TSMC as its second source if it needs. However, given that AMD is cash strapped and does not require extremely high volumes of APUs and CPUs, it is unlikely that the company is re-designing any of its PC chips for TSMC’s process technology. What is possible is that some of the company’s engineers are working on certain semi-custom APUs to be made using 16nm FinFET process technology. Perhaps, Microsoft and Sony would like to get more energy-efficient system-on-chips for Xbox One and PlayStation 4 next year and are willing to pay for appropriate redesigns.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: While AMD will continue to use TSMC as a manufacturing partner, it is obvious that GlobalFoundries is set to become a key producer for the chip developer. AMD wants to re-use maximum amount of chip building blocks it develops across its product line, which is possible only if it uses one foundry partner and one process technology for a wide array of its chips.

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AMD roadmap leaks: Summit Ridge, Bristol Ridge, Basilisk and Styx https://www.kitguru.net/components/anton-shilov/amd-2016-roadmap-leaks-summit-ridge-bristol-ridge-basilisk-and-styx/ https://www.kitguru.net/components/anton-shilov/amd-2016-roadmap-leaks-summit-ridge-bristol-ridge-basilisk-and-styx/#comments Wed, 29 Apr 2015 16:50:40 +0000 http://www.kitguru.net/?p=247334 An alleged AMD insider has published what it appears to be the company’s microprocessor roadmap for 2016. If the plan is accurate and AMD manages to execute it, then next year the company will release a top-to-bottom family of central processing units based on “Zen” micro-architecture as well as one chip featuring its own ARMv8-compatible …

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An alleged AMD insider has published what it appears to be the company’s microprocessor roadmap for 2016. If the plan is accurate and AMD manages to execute it, then next year the company will release a top-to-bottom family of central processing units based on “Zen” micro-architecture as well as one chip featuring its own ARMv8-compatible “K12” cores.

AMD’s “Zen” technology will be used not only for high-performance central processing units as well as accelerated processing units, but also for system-on-chips designed for inexpensive and small form-factor applications, reveals a slide from AMD roadmap for 2016. For applications like tablets AMD intends to offer all-new system-on-chip powered by its ARMv8-compatible “K12” cores, another slide claims. All of AMD's APUs and CPUs due next year are set to be made by GlobalFoundries. Officially, the company’s plans for 2016 are expected to be presented next week, but an alleged employee of AMD published the slides on Wednesday.

“Summit Ridge”: High-performance eight-core AMD processors due next year

After years of waiting, in 2016 AMD plans to introduce its all-new high-performance processors that will replace its current-generation FX-series chips. The new CPUs are going to be based on the brand-new AMD “Zen” microarchitecture that is expected to dramatically improve performance of AMD’s offerings.

amd_roadmap_desktop_2016_zen

As reported, AMD’s high-performance desktop microprocessor due next year will be code-named “Summit Ridge”. The CPU will integrate up to eight “Zen” cores, 4MB L2 cache, 8MB of L3 cache, a dual-channel DDR4 memory controller (DDR3 support should be possible), a PCI Express 3.0 controller as well as other necessary logic. The chip will use AMD’s new FM3 form-factor.

The new central processing unit will be made using 14nm FinFET manufacturing technology at GlobalFoundries. Keeping in mind positioning of AMD FX-series chips, it is highly likely that “Summit Ridge” processors will be optimized for high clock-rates. Still, they are projected to be made using a standard fabrication process since the company is moving away from AMD-specific technologies.

Two or more “Summit Ridge” dies are expected to be used to build many-core AMD Opteron multi-chip-modules (MCMs) for servers.

“Bristol Ridge”: AMD’s first high-performance system-on-chip for desktops and laptops

This year AMD offers two different APUs for desktops and laptops: a classic “Godavari” APU that is designed to run at high clock-rates and a highly-integrated “Carrizo” that is optimized for low power consumption. Next year AMD plans to unify its design approaches and will again offer a “one size fits all” APU code-named “Bristol Ridge”.

amd_roadmap_mobility_2016_zen_k12

AMD’s code-named “Bristol Ridge” chip will be the company’s high-end APU for 2016 desktops and laptops. Highly-integrated “Bristol Ridge” accelerated processing unit will feature up to four “Zen” cores, a Radeon graphics processing unit powered by next-generation GCN architecture, full HSA 1.0 implementation, a dual-channel DDR4 memory controller (DDR3 support should be possible), an integrated input/output controller as well as AMD TrueAudio and Secure Processor technologies.

“Bristol Ridge” APUs for desktops will use the same FM3 form-factor as AMD’s high-end microprocessors.

Mobile versions of “Bristol Ridge” will feature 15W – 35W TDP, will sport FP4 BGA package and will be pin-to-pin compatible with “Carrizo” and ”Carrizo-L” APUs.

While “Bristol Ridge” accelerated processing unit is going to be made using a 14nm fabrication process, given the fact that it will be a system-on-chip – like “Carrizo” – it is highly likely that the processor will not be optimized for high clock-rates. Still, thanks to thinner process technology and new micro-architecture, “Bristol Ridge” APUs will likely offer significantly higher performance compared to existing offerings.

“Basilisk”: Small chip based on “big” architecture

For years, AMD used its low-cost/low-power micro-architectures for its accelerated processing units aimed at inexpensive and energy-efficient notebooks and desktops. In 2016, the company plans to use its high-performance “Zen” micro-architecture to build APUs aimed at basic PCs.

amd_fusion_pencil

AMD’s “Basilisk” accelerated processing unit is projected to have thermal design power of only 5-15W, but it is going to pack a punch. With up to two “Zen” cores, a Radeon graphics processing unit powered by next-generation GCN architecture, full HSA 1.0 implementation, an integrated input/output controller as well as AMD TrueAudio and Secure Processor technologies, “Basilisk” will support all the features of its older brother, “Bristol Ridge”.

The chip will be manufactured at GlobalFoundries using its 14nm FinFET process technology, hence, expect decent clock-rates for an ultra-low-power SoC.

AMD’s “Basilisk” APUs will feature FT4 BGA form-factor, like the rest of AMD’s offerings for mobile applications in 2016.

“Styx”: The first implementation of “K12” for client PCs

AMD has been trying to address the market of media tablets with x86-based offerings since 2011, but without a lot of luck with design wins. Next year the company is going to change its strategy.

amd_fusion_chip_logo_processor

AMD’s “Styx” accelerated processing unit will be the company’s first system-on-chip to integrate the its own 64-bit ARMv8-A instruction set-compatible cores. The APU will also contain a Radeon graphics processing unit powered by next-generation GCN architecture, full HSA 1.0 implementation, built-in input/output capabilities as well as Secure Processor technology.

Thermal design power of the chip will be around 2W and the offering will naturally be aimed at tablets, emerging devices (e.g., set-top-boxes with gaming capabilities, game consoles) and ultra-low-voltage hybrids. The SoC will use FT4 BGA form-factor and will be pin-to-pin compatible with “Basilisk” and “Amur” APUs.

Just like other 2016 chips from AMD, “Styx” will be made using 14nm fabrication process at GlobalFoundries.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: AMD’s client PC roadmaps for next year look very promising on paper. Hopefully, AMD can execute its plans and actual performance of “Zen” will be as impressive as everyone thinks it is.

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More AMD ‘Zen’ CPU details emerge: quad-core units, inclusive cache, high-speed interconnects https://www.kitguru.net/components/cpu/anton-shilov/more-amd-zen-cpu-details-emerge-quad-core-units-inclusive-cache-high-speed-interconnects/ https://www.kitguru.net/components/cpu/anton-shilov/more-amd-zen-cpu-details-emerge-quad-core-units-inclusive-cache-high-speed-interconnects/#comments Tue, 28 Apr 2015 23:00:15 +0000 http://www.kitguru.net/?p=247157 Anonymous insiders from Advanced Micro Devices on Tuesday revealed more details about the company’s upcoming microprocessors based on “Zen” micro-architecture. Just as expected, the new “Zen” central processing units will be dramatically different compared to “Bulldozer” CPUs. Moreover, as it appears, AMD intends to reconsider some of the things that it has not changed for …

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Anonymous insiders from Advanced Micro Devices on Tuesday revealed more details about the company’s upcoming microprocessors based on “Zen” micro-architecture. Just as expected, the new “Zen” central processing units will be dramatically different compared to “Bulldozer” CPUs. Moreover, as it appears, AMD intends to reconsider some of the things that it has not changed for decades.

Based on the slide published on Tuesday, AMD will no longer use dual-core modules with shared floating point unit and some other resources. By contrast, “Zen” cores will be organized in quad-core units that share only L3 cache as well as special high-speed links that are designed to interconnect multiple units together. It is not completely clear why AMD decided to create quad-core units, but, perhaps, the company wants to easily scale amount of cores for different types of microprocessors. For example, server chips would benefit from 8-16 cores, whereas client APUs hardly need more than four x86 cores.

amd_quad_core_zen

Each “Zen” core in the upcoming AMD chips will be equipped with 512KB L2 cache and each quad-core unit will sport 8MB of shared L3 cache. The new microprocessors from AMD will feature fully inclusive cache design, just like Intel CPUs do. Inclusive cache design means that larger caches also include data located in smaller caches (e.g., L2 contains data contained in L1). AMD’s chips have used exclusive cache design since the K6 processors in mid-nineties in a bid to maximize efficiency of its caches. The decision to reconsider cache design is another indicator that “Zen” is a brand-new architecture from AMD.

It is noteworthy that quad-core units do not integrate memory controllers.Potentially, this means that AMD will have flexibility to scale its memory interfaces depending on actual need, not because it adds cores into designs.

Based on unofficial information, AMD’s code-named “Summit Ridge” processors will sport eight “Zen” cores (i.e., two quad-core units), a dual-channel DDR3/DDR4 memory controller and a PCI Express 3.0 x16 controller.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: In the past couple of days we learned a couple of new things regarding topology and architecture of AMD's upcoming “Zen” processors. Unfortunately, we still have no idea about their performance…

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Diagram of AMD’s ‘Zen’ CPU core leaks: six integer pipes, two 256-bit FPUs [UPDATED] https://www.kitguru.net/components/cpu/anton-shilov/diagram-of-amds-zen-cpu-core-leaks-eight-cores-two-256-bit-fpus-confirmed/ https://www.kitguru.net/components/cpu/anton-shilov/diagram-of-amds-zen-cpu-core-leaks-eight-cores-two-256-bit-fpus-confirmed/#comments Tue, 28 Apr 2015 01:46:47 +0000 http://www.kitguru.net/?p=246932 UPDATE: The original story stated that it described an implementation of an AMD microprocessor based on “Zen” micro-architecture. In fact, the story describes one “Zen” core. Although there are a lot of rumours about AMD’s next-generation code-named “Zen” microprocessors, there are not a lot of official or even semi-official details about the chips. On Monday an …

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UPDATE: The original story stated that it described an implementation of an AMD microprocessor based on “Zen” micro-architecture. In fact, the story describes one “Zen” core.

Although there are a lot of rumours about AMD’s next-generation code-named “Zen” microprocessors, there are not a lot of official or even semi-official details about the chips. On Monday an alleged AMD employee posted what appears to be a slide from AMD’s presentation containing a block diagram of one “Zen” microprocessor core.

The block diagram, which details a core of AMD’s “Summit Ridge” microprocessor, reveals that the execution unit will have six integer pipelines as well as two non-shared 256-bit floating point units (FPUs). Previously it was reported that the “Summit Ridge” chip has eight cores, dual-channel DDR4 memory controller as well as 95W thermal design power. The image was published in Planet3DNow.de forums by an anonymous poster.

amd_fusion_apu_chip_1

At present AMD’s FPU features two 128-bit FMAC (fused multiply–add capability) pipelines that can be unified into one large 256-bit-wide unit if one of the integer cores dispatches an AVX instruction. While this approach technically works for AVX and floating-point operations, it is not very efficient: AVX execution is dramatically slower on AMD’s chips compared to Intel’s chips.

amd_zen_official

Two 256-bit FPUs mean that AMD’s future microprocessors based on “Zen” micro-architecture will significantly improve performance in applications that use floating point units as well as heavily rely on AVX instructions. Moreover, theoretically, two 256-bit FPUs could support 512-bit AVX instructions.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: It looks like AMD plans to reveal the first official set of details about “Zen” at its financial analyst day next week. It is very likely that in addition to basic things about the new processors, the company will also disclose more details about the CPUs. Given the fact that AMD should already have the first working samples of “Summit Ridge”, it is possible that AMD will also demonstrate the chips in action.

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32-core AMD Opteron to feature quad-die MCM design https://www.kitguru.net/components/cpu/anton-shilov/32-core-amd-opteron-to-feature-quad-die-mcm-design/ https://www.kitguru.net/components/cpu/anton-shilov/32-core-amd-opteron-to-feature-quad-die-mcm-design/#comments Fri, 24 Apr 2015 02:56:24 +0000 http://www.kitguru.net/?p=246478 Advanced Micro Devices will continue to use multi-chip-module design for its upcoming AMD Opteron processors. This should greatly help the company to reduce its development and manufacturing costs, but may affect performance of its central processing units for servers. The forthcoming AMD Opteron processors with up to 32 cores based on the “Zen” micro-architecture will …

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Advanced Micro Devices will continue to use multi-chip-module design for its upcoming AMD Opteron processors. This should greatly help the company to reduce its development and manufacturing costs, but may affect performance of its central processing units for servers.

The forthcoming AMD Opteron processors with up to 32 cores based on the “Zen” micro-architecture will consist of up to four eight-core dies known as “Summit Ridge”, reports Fudzilla. Each “Summit Ridge” chip has a dual-channel DDR4 memory controller, therefore, the new Opteron chips will feature an eight-channel memory sub-system. Nowadays AMD uses two eight-core and six-core dies in order to make 16-core and 12-core Opteron processors, respectively. Other developers of server chips, such as IBM, also use MCM approach to build high-end server processors.

amd_opteron_6300_hand

Design of an advanced microprocessor that will be made using a FinFET process technology costs north from $150 million without the cost of photomasks needed for production. It makes a great sense for AMD to use “Summit Ridge” dies for desktops and workstations for its upcoming Opteron chips for servers. However, topology of the new AMD Opteron processors and dual-socket platforms will get very complex because of the multi-die MCM implementation.

Each “Zen” core in the new AMD Opteron systems will have to maintain cache coherency with other cores no matter where they are physically located. As a result, AMD will have to introduce an ultra-high-bandwidth interconnect technology for its upcoming chips that will be fast enough to maintain cache coherency and provide unified memory access to all processing cores.

AMD’s next-generation Opteron processors will feature a land grid array (LGA) packaging as well as up to 140W thermal design power.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: While it is logical for AMD to build its server chips using desktop-class dies, not everything looks that simple. At least on paper, the topology of AMD’s next-generation dual-socket server platform resembles that of an octa-socket platform based on the company’s HyperTransport technology from 2002-2003. That platform has never made it to the market, even though HyperTranport technology itself is still used (it was renamed to Direct Connect architecture at some point). Perhaps, Jim Keller, the lead architect behind AMD K8 (x86-64) and HyperTransport, decided to give a successor of coherent HyperTransport another try in an ultra-complex platform architecture? Everything is possible at this point, but it remains to be seen how high performance of such platform will be.

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Next-gen AMD Opteron chips to feature up to 32 cores https://www.kitguru.net/components/cpu/anton-shilov/next-gen-amd-opteron-chips-to-feature-up-to-32-cores/ https://www.kitguru.net/components/cpu/anton-shilov/next-gen-amd-opteron-chips-to-feature-up-to-32-cores/#comments Tue, 21 Apr 2015 01:09:40 +0000 http://www.kitguru.net/?p=245958 Advanced Micro Devices currently commands less than two per cent of the world’s server CPU market, but next year it plans to start recapturing its share from Intel Corp. with new Opteron microprocessors based on “Zen” micro-architecture. According to a media report, AMD’s next-gen server chips offer unprecedented amount of cores and should be pretty …

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Advanced Micro Devices currently commands less than two per cent of the world’s server CPU market, but next year it plans to start recapturing its share from Intel Corp. with new Opteron microprocessors based on “Zen” micro-architecture. According to a media report, AMD’s next-gen server chips offer unprecedented amount of cores and should be pretty competitive.

AMD’s highest-performing Opteron microprocessors due next year will integrate 32 cores with simultaneous multithreading technology, according to a report from Fudzilla. Each core will feature 512KB L2 cache (16MB L2 cache in total) and the whole chip will also sport 64MB of unified L3 cache. The central processing unit is also projected to have eight DDR4 memory channels capable of handling 256GB of memory per channel.

amd_opteron_6300_g34

At present it is unclear whether the upcoming many-core AMD Opteron products will be monolithic, or will use multi-chip-module (MCM) design like today’s server processors from AMD.

The upcoming AMD Opteron processors will rely on brand-new platform with a new core-logic set. The chipset is projected to support PCI Express 3.0, Serial ATA, four 10Gb Ethernet controllers and so on.

AMD did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: 32 core processors should offer loads of advantages for server workloads. Still, it remains to be seen what Intel plans to offer next year. Nowadays the highest-performing Intel Xeon processors carry 18 “Haswell” cores, but in 2016 the company will be able to increase that amount significantly thanks to transition to 14nm process technology.

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Samsung to make 14nm graphics processors for Nvidia https://www.kitguru.net/components/graphic-cards/anton-shilov/samsung-to-make-14nm-graphics-processors-for-nvidia/ https://www.kitguru.net/components/graphic-cards/anton-shilov/samsung-to-make-14nm-graphics-processors-for-nvidia/#comments Mon, 13 Apr 2015 22:59:37 +0000 http://www.kitguru.net/?p=244915 Nvidia Corp. will use Samsung Electronics’ manufacturing capacities to produce graphics processing units, according to a media report. The move will help Nvidia to increase performance of its GPUs without boosting their power consumption. When Nvidia revealed earlier this year that it will use Samsung’s services to build its chips, it was unclear whether the …

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Nvidia Corp. will use Samsung Electronics’ manufacturing capacities to produce graphics processing units, according to a media report. The move will help Nvidia to increase performance of its GPUs without boosting their power consumption.

When Nvidia revealed earlier this year that it will use Samsung’s services to build its chips, it was unclear whether the company will order manufacturing of graphics processors or application processors. According to a report from KoreaTimes, Samsung will make GPUs for Nvidia using its 14nm FinFET manufacturing process.

Samsung’s 14nm fabrication technology will help Nvidia to pack significantly more execution units, such as stream processors, inside its GPUs, which will substantially increase their performance in games and other applications.

nvidia_artwork

Previously Nvidia planned to make its code-named “Pascal” graphics processing units using TSMC’s 16nm FinFET manufacturing technology. As it turns out, the company will also use Samsung’s 14nm FinFET process to make its future GPUs.

Samsung is in process of finding new revenue sources. Making chips for Nvidia will significantly increase earnings of the company’s foundry business unit.

“The latest agreement between Samsung and Nvidia is another positive factor lifting Samsung's logic chip business unit. The timing looks good as increased foundry customers justify the Korean chip giant's moves to find new revenue sources,” said a source familiar with the deal.

Nvidia and Samsung did not comment on the news-story.

Discuss on our Facebook page, HERE.

KitGuru Says: What remains to be seen is whether Nvidia will alter its roadmap because of Samsung. The latter is already mass producing 14nm FinFET chips, whereas TSMC will only start making ICs [integrated circuits] using its 16nm FinFET process technology in Q3 2015. Perhaps, Nvidia will be able to roll-out its “Pascal” GPUs ahead of its original plan in 2016.

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Nvidia starts to use Samsung as a chip manufacturing partner – company https://www.kitguru.net/components/anton-shilov/nvidia-starts-to-use-samsung-as-a-chip-manufacturing-partner-company/ https://www.kitguru.net/components/anton-shilov/nvidia-starts-to-use-samsung-as-a-chip-manufacturing-partner-company/#comments Fri, 20 Mar 2015 14:01:08 +0000 http://www.kitguru.net/?p=241183 Nvidia Corp. and Samsung Electronics have quietly signed an agreement under which the latter will produce computer chips for the former. At present, it is unknown whether Samsung will manufacture graphics processors or application processors for the chip designer, but it is obvious that Taiwan Semiconductor Manufacturing Co. is no longer exclusive production partner of …

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Nvidia Corp. and Samsung Electronics have quietly signed an agreement under which the latter will produce computer chips for the former. At present, it is unknown whether Samsung will manufacture graphics processors or application processors for the chip designer, but it is obvious that Taiwan Semiconductor Manufacturing Co. is no longer exclusive production partner of Nvidia.

“We utilize industry-leading suppliers, such as Taiwan Semiconductor Manufacturing Company Limited and Samsung Electronics Co. Ltd, to produce our semiconductor wafers,” a statement in the company’s latest 10K filing reads. Previously, similar filings only said that Nvidia uses manufacturing capacities of TSMC.

Rumours that Samsung will produce chips for Nvidia have been floating around for a number of months, but Nvidia Corp. has been downplaying them.

nvidia_tegra_x1_cut

Right now Nvidia’s lineup of products includes graphics processing units (GPUs) produced using TSMC’s 28nm fabrication process, mobile application processors made using low-power 28nm manufacturing technology as well as system-on-chips for automotive applications manufactured at TSMC’s 20nm node. Going forward Nvidia plans to make GPUs (that belong to the “Pascal” generation) and future SoCs using TSMC’s 16nm FinFET and 16nm FinFET+ process technologies, according to publicly available roadmaps.

It is unknown which processors will Samsung produce for Nvidia. Fabrication technologies at different foundries are dissimilar; hence, Samsung cannot start production of the same chips as TSMC immediately. Nvidia will have to redesign its products for Samsung’s manufacturing technologies using different libraries of elements and design tools.

samsung_semiconductor_foundry_chip_production_1

Many fabless chip developers nowadays are concerned about yields of processors that will be made using 14nm FinFET and 16nm FinFET manufacturing technologies at Samsung/GlobalFoundries and TSMC, respectively. In addition, they are concerned about availability of manufacturing capacities at leading foundries. Therefore, fabless designers plan to diversify FinFET chip suppliers, something that is expected to bring a lot of benefits to Samsung and GlobalFoundries.

Since TSMC will be late with volume production of chips using 16nm FinFET process technologies, for many makers it makes a great sense to contract Samsung, who is already making semiconductors using 14nm FinFET manufacturing technology.

NVIDIA_GeForce_GTX_900series_KeyVisual_HD_003

One analyst believes that Nvidia plans to use its contract with Samsung’s not only to get access to leading-edge fabrication processes and to ensure high-volume supply of chips, but also in order to cut-down its costs.

“We believe that Nvidia has a second source for foundry wafers in Samsung, outside of TSMC,” said Doug Freedman, an analyst with RBC Capital Markets, in a note to clients, reports SemiconductorEngineering. “While it may be a small part of the wafer supply today, it should create a tailwind for [gross margin percentage] going forward as we believe that non-TSMC wafers can be purchased at as much as 10% below present cost levels.”

No matter what Nvidia’s goals with Samsung’s foundry are, the partnership between the two companies represents a major win for Samsung’s contract manufacturing business unit. There are also rumours that Qualcomm might start using Samsung's chip production services this year. This is also a wake-up call for TSMC as its major customers are now looking at other foundries.

Discuss on our Facebook page, HERE.

KitGuru Says: It is rather ironic that as Nvidia and Samsung collaborate for chip manufacturing, the two companies are fighting in courts and accuse each other of patent infringements.

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AMD cuts ‘Bulldozer’ instructions from ‘Zen’ processors https://www.kitguru.net/components/cpu/anton-shilov/amd-cuts-bulldozer-instructions-from-zen-processors/ https://www.kitguru.net/components/cpu/anton-shilov/amd-cuts-bulldozer-instructions-from-zen-processors/#comments Thu, 19 Mar 2015 03:37:05 +0000 http://www.kitguru.net/?p=240848 Advanced Micro Devices has been talking about development of its next-generation high-performance “Zen” architecture for months now, but so far it has not revealed any details about the chips officially. Nonetheless, thanks to a recent patch for Linux we have learnt one significant detail about “Zen”: it will not support many instructions found in the current-generation …

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Advanced Micro Devices has been talking about development of its next-generation high-performance “Zen” architecture for months now, but so far it has not revealed any details about the chips officially. Nonetheless, thanks to a recent patch for Linux we have learnt one significant detail about “Zen”: it will not support many instructions found in the current-generation processors.

AMD recently started to enable support of its forthcoming “Zen” microprocessors in Linux operating systems. While typically patches to Linux distributives do not reveal a lot of micro-architectural peculiarities of various central processing units, this time is a clear exception. AMD explicitly revealed in the description of the patch to the GNU Binutils package that “Zen”, its third-generation x86-64 architecture in its first iteration (znver1 – Zen, version 1), will not support TBM, FMA4, XOP and LWP instructions developed specifically for the “Bulldozer” family of micro-architectures.

Elimination of such instructions clearly points to the fact that AMD’s new micro-architecture is a complete far cry from “Bulldozer”. The company even decided to remove support of the “Bulldozer”-specific instructions to save transistors and die space for something more useful. It seems that AMD now considers “Bulldozer” a dead-end and does not want to support even promising instructions introduced in the recent iterations of the company’s micro-architectures.

amd_apu_beema_mullins_puma_jaguar_x86_fusion

While FMA4 and XOP could boost performance in gaming, HPC and multimedia applications, a promising thing that will be missed by numerous programmers is LWP, or lightweight profiling.

The lightweight profiling was developed to enable code to make dynamic and real-time decisions about how best to improve the performance of simultaneously running tasks, using techniques such as memory organization and code layout, with very little overhead. The LWP is a set of hardware features in AMD “Bulldozer” processors, which should be considered when designing applications.

AMD did not comment on the new-story.

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KitGuru Says: While it is sad to see many things go, it looks like “Zen” is so different from “Bulldozer” that it simply did not make sense to keep those instructions in the new processors. AMD probably believes that even without those instructions the new chips will be able to deliver competitive performance.

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AMD begins to enable ‘Zen’ processors support in Linux https://www.kitguru.net/components/cpu/anton-shilov/amd-begins-to-enable-zen-processor-architecture-support-in-linux/ https://www.kitguru.net/components/cpu/anton-shilov/amd-begins-to-enable-zen-processor-architecture-support-in-linux/#comments Wed, 18 Mar 2015 16:46:19 +0000 http://www.kitguru.net/?p=240791 Advanced Micro Devices has begun to add support of its upcoming microprocessors powered by “Zen” micro-architecture to Linux operating systems. The enablement of future chips in Linux confirms AMD’s plans to release such central processing units and even reveals some facts about their functionality. Unfortunately, addition of support does not indicate launch schedules anyhow. One …

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Advanced Micro Devices has begun to add support of its upcoming microprocessors powered by “Zen” micro-architecture to Linux operating systems. The enablement of future chips in Linux confirms AMD’s plans to release such central processing units and even reveals some facts about their functionality. Unfortunately, addition of support does not indicate launch schedules anyhow.

One of the milestones every processor passes before launch is its enablement in Linux operating systems. Since it is impossible to add support to an open-source OS confidentially, CPU developers have to do it publically, thus revealing essential information about their chips, such as supported instruction set, internal names, identifiers, etc.

Last week AMD published an “add znver1 processor” patch to the GNU Binutils package, reports Phoronix. In the coming weeks and months AMD will also add support of its “Zen” micro-architecture to GCC and LLVM/Clang compilers, the Linux kernel and so on.

AMD’s third-generation x86-64 architecture in its first iteration marked as “znver1” (Zen, version 1)* supports SMAP, RDSEED, SHA, XSAVEC, XSAVES, CLFLUSHOPT, ADCX as well as CLZERO instructions. At the same time, Zen no longer supports TBM, FMA4, XOP, LWP instructions.

amd_fusion_apu_chip_1

The instruction set architecture (ISA) extensions which support is added to the patch mainly concern various security features of modern x86 microprocessors as well as improve performance in cryptography and high-performance computing tasks:

  • SMAP – Supervisor Mode Access Prevention, a security feature first debuted in “Ivy Bridge” processors;
  • RDSEED – An addition to the AES (Advanced Encryption Standard) instructions known as Secure Key Instructions. First debuted in “Broadwell” microprocessors;
  • SHA – The family of seven new SSE based instructions that support performance acceleration of the Secure Hash Algorithm (SHA) on x86 processors. Intel started to implement SHA instructions starting from its “Haswell” processors;
  • XSAVEC – Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. First debuted in “Broadwell” microprocessors;
  • ADCX – An instruction for improving performance of arbitrary-precision integer operations. Debuted in “Broadwell” processor along with ADOX instruction.

The list of new instructions supported by AMD’s “Zen” microprocessors is not full. Going forward the company will most likely release new patches for Linux with support for additional instructions. Furthermore, expect AMD to start releasing special whitepapers for software developers, explaining how to optimize their applications for the upcoming central processing units. Typically, such documents for programmers reveal possible configurations and micro-architecture peculiarities of unreleased chips. Actual target specifications are usually revealed in various documents for hardware and firmware developers.

The addition of “Zen” support to Linux operating systems means that the company is going to start distributing samples of its new processors to various software and hardware developers in the coming quarters.

AMD did not comment on the news-story.

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KitGuru Says: By adding support of “Zen to Linux AMD reveals the first official information about its upcoming family of microprocessors. We now know that the chips will support loads of features found in the “Haswell” and “Broadwell” processors from Intel, but will scrap some of AMD’s own ISA extensions.

*AMD calls “Bulldozer” micro-architecture its second-generation x86-64 architecture. The original “Bulldozer” is called “bdver1”, the “Piledriver” is “bdver2”, the “Steamroller” is “bdver3”, etc.

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