CLN16FF | KitGuru https://www.kitguru.net KitGuru.net - Tech News | Hardware News | Hardware Reviews | IOS | Mobile | Gaming | Graphics Cards Sat, 03 Oct 2015 22:25:13 +0000 en-US hourly 1 https://wordpress.org/?v=6.4.3 https://www.kitguru.net/wp-content/uploads/2021/06/cropped-KITGURU-Light-Background-SQUARE2-32x32.png CLN16FF | KitGuru https://www.kitguru.net 32 32 Xilinx starts to ship 16nm FinFET+ chip ahead of schedule https://www.kitguru.net/components/anton-shilov/xilinx-begins-to-ship-worlds-first-16nm-finfet-chip-ahead-of-schedule/ https://www.kitguru.net/components/anton-shilov/xilinx-begins-to-ship-worlds-first-16nm-finfet-chip-ahead-of-schedule/#respond Sat, 03 Oct 2015 00:48:43 +0000 http://www.kitguru.net/?p=270450 Xilinx, a leading maker of programmable gate arrays as well as special-purpose system-on-chip solutions, this week said that it had made the first customer shipment of its Zynq UltraScale+ processing solution. The chip is made using Taiwan Semiconductor Manufacturing Co.’s second-generation 16nm FinFET process technology (CLN16FF+) with increased performance and lowered power consumption. The Xilinx …

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Xilinx, a leading maker of programmable gate arrays as well as special-purpose system-on-chip solutions, this week said that it had made the first customer shipment of its Zynq UltraScale+ processing solution. The chip is made using Taiwan Semiconductor Manufacturing Co.’s second-generation 16nm FinFET process technology (CLN16FF+) with increased performance and lowered power consumption.

The Xilinx Zynq UltraScale+ all-programmable multi-processor system-on-chip (AP MPSoC) integrates four ARM Cortex-A53 general-purpose cores, two ARM Cortex-R5 real time processing units, and an ARM Mali-400 graphics processor. The MPSoC also includes integrated peripherals, safety and security engines, and advanced power management. The system-on-chip also sports UltraScale programmable logic fabric as well as the new UltraRAM on-chip memory technology. Production of the chip using TSMC’s 16nm FinFET+ fabrication process helped Xilinx to improve its complexity and performance while ensuring low power consumption.

The Zynq UltraScale+ chips were shipped to an undisclosed customer about a quarter ahead of schedule, according to the developer. The company does not reveal details about the volumes, but it looks like Xilinx sold the very first A0 revision chips it got back from the fab to a client after verifying that they are fully-functional and meet performance targets. The ability to sell the A0 revision of a chip indicates perfect design of the Xilinx Zynq UltraScale+ and lack of problems with TSMC’s CLN16FF+.

TSMC’s 16nm FinFET production cycle for a batch of chips is about 90 days. The second batch will be ready around three months after Xilinx places an appropriate order. If Xilinx places an order now, it will get its chips sometimes in Q1 2016.

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“TSMC's ongoing collaboration with Xilinx has resulted in the early shipment of a world class 16nm FinFET multiprocessing SoC,” said BJ Woo, vice president of business development at TSMC. “Xilinx and TSMC have clearly demonstrated and delivered industry-leading silicon performance with the lowest power consumption, and highest level of systems integration and intelligence among all programmable logic products to date.”

The Zynq UltraScale+ can be used for a wide variety of applications, including computerized vision systems, such as advanced driver assistance systems (ADAS), surveillance, 5G base stations and other. Thanks to the fact that the MPSoC features general-purpose and highly-parallel graphics processing cores, the Zynq UltraScale+ can process and analyze data as well as make decisions and initiate actuator commands. Xilinx claims that the MPSoC offers a scalable and highly customizable programmable platform that will enable future-proof customer designs.

“The early delivery of our Zynq UltraScale+ MPSoC 16nm device extends our outstanding track record for total execution and absolute quality. We call this a “Three-Peat” – being first to market with leadership products at 28nm, 20nm, and now at 16nm,” said Victor Peng, executive vice president and general manager of the programmable products group at Xilinx.

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KitGuru Says: This is not the first time when Xilinx begins to ship chips made using TSMC’s leading-edge process technology ahead of all rivals, including Altera. If the company really managed to get a 16nm FinFET design right from the very first revision, this clearly indicates that the company has one of the best engineers in the industry.

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Apple double-sources its A9 chips from Samsung and TSMC https://www.kitguru.net/components/anton-shilov/apple-double-sources-its-a9-chips-from-samsung-and-tsmc/ https://www.kitguru.net/components/anton-shilov/apple-double-sources-its-a9-chips-from-samsung-and-tsmc/#respond Tue, 29 Sep 2015 00:57:22 +0000 http://www.kitguru.net/?p=269781 In a bid to ensure steady supply of its latest system-on-chips for its new iPhone smartphones, Apple decided to source the SoCs from two contract makers of semiconductors: Samsung Foundry and Taiwan Semiconductor Manufacturing Co. Apple’s new iPhone 6S and iPhone 6S Plus smartphones use A9 processors made by Samsung using 14nm FinFET fabrication process …

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In a bid to ensure steady supply of its latest system-on-chips for its new iPhone smartphones, Apple decided to source the SoCs from two contract makers of semiconductors: Samsung Foundry and Taiwan Semiconductor Manufacturing Co.

Apple’s new iPhone 6S and iPhone 6S Plus smartphones use A9 processors made by Samsung using 14nm FinFET fabrication process (APL0898) as well as TSMC using its 16nm FinFET manufacturing technology (APL1022), according to Chipworks. The Samsung-made system-on-chip is slightly smaller it has die size of around 96mm2. By contrast, the A9 application processor made by TSMC has die size of around 94.5mm2.

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Apple’s new smartphones are expected to be the most popular iPhones ever. The company may sell around 90 million new handsets by the end of the year, which means that it needs 90 million SoCs. Volume requirement is the primary reason why Apple decided to ink supply agreements with two foundries. Sourcing chips from different manufacturers means that Apple will have no problems with supply and will also be able to negotiate the lowest prices.

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It is extremely hard to build identical chips using different process technology. It remains to be seen which SoC consumes less power and emits less heat.

Apple did not comment on the news-story.

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KitGuru Says: It will be very interesting to find out whether Apple also uses GlobalFoundries to produce chips using Samsung’s 14nm LPE [low-power early] fabrication process…

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TSMC obtains orders from AMD and Nvidia for 16nm FinFET chips https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-obtains-orders-from-amd-and-nvidia-for-16nm-finfet-chips/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-obtains-orders-from-amd-and-nvidia-for-16nm-finfet-chips/#comments Tue, 25 Aug 2015 09:24:16 +0000 http://www.kitguru.net/?p=264755 Although Taiwan Semiconductor Manufacturing Co. is behind Samsung Foundry with its first-generation FinFET fabrication technology, which is why it lost orders from Apple and Qualcomm, it will still produce chips using 16nm FinFET manufacturing process for other major customers, including Advanced Micro Devices and Nvidia Corp. Advanced Micro Devices plans to use both 14nm FinFET …

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Although Taiwan Semiconductor Manufacturing Co. is behind Samsung Foundry with its first-generation FinFET fabrication technology, which is why it lost orders from Apple and Qualcomm, it will still produce chips using 16nm FinFET manufacturing process for other major customers, including Advanced Micro Devices and Nvidia Corp.

Advanced Micro Devices plans to use both 14nm FinFET and 16nm FinFET process technologies for its products due next year. It is believed that the company will order 14nm microprocessors from GlobalFoundries, whereas TSMC will concentrate on manufacturing of next-generation AMD Radeon graphics processing units code-named “Greenland” and other using 16nm FinFET process.

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Nvidia Corp. added Samsung Foundry into the list of its manufacturing partners earlier this year, but it will continue to use TSMC’s services for its next-generation GP100 graphics chip based on the “Pascal” architecture.

In addition to AMD and Nvidia, the list of TSMC’s 16nm FinFET clients include Apple, Avago, Broadcom, HiSilicon Technologies, LG Electronics, MediaTek and Xilinx, reports DigiTimes web-site.

Samsung Foundry got orders to produce Apple A9 and Qualcomm Snapdragon 820 system-on-chips using its 14nm fabrication process.

TSMC did not comment on the news-story.

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KitGuru Says: Despite the fact that TSMC is late to market with its 16nm FinFET manufacturing process, it looks like the company will still get a lot of orders from its customers.

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TSMC begins shipments of chips made using 16nm FinFET process tech https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-begins-shipments-of-chips-using-16nm-finfet-process-technology/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-begins-shipments-of-chips-using-16nm-finfet-process-technology/#comments Fri, 17 Jul 2015 12:26:37 +0000 http://www.kitguru.net/?p=259513 Taiwan Semiconductor Manufacturing Co. announced on Thursday that it had started volume production of chips using its 16nm FinFET manufacturing technology in the second quarter of 2015. The world’s largest contract maker of semiconductors is delivering the first batch of products made at 16nm node to its customers right now, according to chief executive of …

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Taiwan Semiconductor Manufacturing Co. announced on Thursday that it had started volume production of chips using its 16nm FinFET manufacturing technology in the second quarter of 2015. The world’s largest contract maker of semiconductors is delivering the first batch of products made at 16nm node to its customers right now, according to chief executive of TSMC. The high-volume ramp of 16nm FinFET tech begins this quarter, on-track with expectations.

“We have begun volume production of 16 FinFET in second quarter,” said C.C. Wei, president and co-CEO of TSMC, during the company’s earnings conference call with investors and financial analysts. “Shipment has started this month. The high volume ramp in third quarter [will be] mostly contributed to revenue in fourth quarter this year.”

Previously TSMC said that high-volume production of chips using its 16nm FinFET (CLN16FF) process technology starts in the third quarter, with meaningful revenue contribution beginning in the Q4 2015. The current announcement confirms that high-volume ramp of TSMC’s first process technology with FinFETs [fin-shaped field-effect transistors] proceeds in accordance with the plans.

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TSMC’s 16nm FinFET (CLN16FF), 16nm FinFET+ (CLN16FF+) and 16nm FinFET compact (CLN16FFC) fabrication processes all rely on metal back end of line (BEOL) interconnect flow of 20nm manufacturing technology. As a result, while the chips produced using TSMC’s 16nm tech cannot boast with leading-edge transistor density and have very high per-transistor costs, TSMC can ensure rather high yields with its new process.

“Since 16nm shares similar metal backend process with 20nm, our 16nm FinFET can benefit a lot from 20nm's learning,” said Mr. Wei. “We have already shipped more than half of a million CLN20SOC wafers by now, so our 16nm’s yield and defect density has been excellent. In fact, our 16nm FinFET has set a new record for progresses made in the defect density reduction.”

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Because 16nm FinFET fabrication process is more universal than TSMC’s CLN20SOC, which was designed solely for mobile system-on-chips, more customers will use the new manufacturing technology. TSMC is aggressively expanding its 16nm capacities and is also converting some of its 20nm product lines to 16nm. The company expects wafer revenue for 16nm process to account over 20 per cent of its total wafer revenue next year.

“The ramping of our 16nm will be very steep, even steeper than our 20nm,” said Mr. Wei.

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TSMC does not disclose names of its customers, but it is highly likely that the first company to get TSMC’s 16nm chips is Apple. It is possible that the lion’s share of TSMC’s 16nm capacities in Q3 2015 will be used to make Apple’s A9 chips for next-generation iPhone and iPad products. TSMC is expected to deliver the first high-volume batch of 16nm FinFET products in October. Initial next-gen smartphones from Apple will be based on semiconductors produced by Samsung Electronics using its 14nm LPE fabrication process.

Discuss on our Facebook page, HERE.

KitGuru Says: TSMC is over half of a year behind Samsung Foundry with volume production of chips using a FinFET process. Keeping in mind vast manufacturing capacities of TSMC, the company will probably beat Samsung in terms of volumes. However, when it comes to time-to-market, Samsung is clearly ahead of its rival.

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AMD: We have taped out our first FinFET products https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-we-have-taped-out-our-first-finfet-products/ https://www.kitguru.net/components/graphic-cards/anton-shilov/amd-we-have-taped-out-our-first-finfet-products/#comments Fri, 17 Jul 2015 02:48:59 +0000 http://www.kitguru.net/?p=259448 Advanced Micro Devices said on Thursday that it had taped out its first products, which will be made using a FinFET process technology. While AMD does not reveal which products it had taped out, it is highly-likely that one of them is a highly-anticipated microprocessor based on “Zen” micro-architecture. “We have actually just taped-out our …

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Advanced Micro Devices said on Thursday that it had taped out its first products, which will be made using a FinFET process technology. While AMD does not reveal which products it had taped out, it is highly-likely that one of them is a highly-anticipated microprocessor based on “Zen” micro-architecture.

“We have actually just taped-out our first couple of FinFET designs,” said Lisa Su, chief executive officer of Advanced Micro Devices, during the company’s earnings conference call with investors and financial analysts.

Ms. Su did not elaborate which of the future designs the company had taped out and when exactly this happened. Nonetheless, two tape-outs mean that the company has managed to successfully design its first products with FinFET transistors. Design of an advanced microprocessor that will be made using a FinFET process technology costs north from $150 million without the cost of photomasks needed for production. Therefore, the tape-out means that the vast majority of investments in these two chips have been made.

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Tape-out is the final stage of the design cycle of an integrated circuit, the point at which the artwork of the IC is sent to a maker of photomasks. Once the set of photolithographic masks is ready and verified, it is sent to a contract manufacturer of the chip, which produces the first working samples of the chip. It may take up to several weeks to prepare a mask-set. Production cycle of a complex FinFET processor is around 90 days from wafer start to chip delivery. As a result, if AMD taped out its first FinFET chips in June, then the company will get the first samples of its products in September.

Mass production of chips nowadays starts between nine and twelve months after the initial tape-out. Therefore, if AMD managed to tape-out its chips last month, then it is on-track to start their high-volume production next June or a bit earlier and release its first products made using a FinFET process technology in late Q3 or early Q4 2016.

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AMD does not disclose which of its FinFET chips it has taped-out. Based on official and unofficial information, it is highly likely that the first AMD products to be made using a FinFET fabrication process will be the code-named “Summit Ridge” central processing unit with up to eight “Zen” cores as well as the code-named “Greenland” graphics processing unit based on the next iteration of the GCN [graphics core next] architecture. Over time all AMD products will be made using FinFET process technologies. The “Summit Ridge” will be used for next-generation AMD Opteron processors for servers as well as for AMD FX processors for desktops.

“We will be bringing different parts of the product line into FinFET at different points in time,” said Ms. Su. “I think what we have said is graphics [processors] will certainly utilize FinFETs as well as our new Zen processors and so they will roll out over the quarters in 2016.”

It is noteworthy that AMD still does not want to disclose its manufacturing partner for FinFET process technologies in 2016.

Discuss on our Facebook page, HERE.

KitGuru Says: It is a long time before we will see the first FinFET products from AMD on the market. However, it is great to see that the company has finished its first two FinFET designs. The biggest part of the work is over for the two FinFET-based products, now AMD needs to execute and release them in time.

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Xilinx tapes-out world’s first 16nm FinFET+ system-on-chip https://www.kitguru.net/components/anton-shilov/xilinx-tapes-out-worlds-first-16nm-finfet-system-on-chip/ https://www.kitguru.net/components/anton-shilov/xilinx-tapes-out-worlds-first-16nm-finfet-system-on-chip/#respond Wed, 01 Jul 2015 22:14:07 +0000 http://www.kitguru.net/?p=256996 Xilinx, a leading designer of field-programmable gate arrays as well as special-purpose system-on-chip solutions, on Wednesday said that it had taped-out one of the world’s first SoCs to be made using TSMC’s 16nm FinFET+ process technology. The new chip will be used for self-driving vehicles, industrial Internet-of-Things and 5G wireless systems in the coming years. …

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Xilinx, a leading designer of field-programmable gate arrays as well as special-purpose system-on-chip solutions, on Wednesday said that it had taped-out one of the world’s first SoCs to be made using TSMC’s 16nm FinFET+ process technology. The new chip will be used for self-driving vehicles, industrial Internet-of-Things and 5G wireless systems in the coming years.

The new Xilinx Zynq UltraScale+ all-programmable multi-processor system-on-chip (AP MPSoC) integrates four ARM Cortex-A53 general-purpose cores, two ARM Cortex-R5 real time processing units, and an ARM Mali-400 graphics processing unit. The MPSoC also includes integrated peripherals, safety and security engines, and advanced power management. The system-on-chip also sports UltraScale programmable logic fabric as well as the new UltraRAM on-chip memory technology.

The Zynq UltraScale+ can be used for a wide variety of applications, including computerized vision systems, such as advanced driver assistance systems (ADAS), surveillance and other. Thanks to the fact that the MPSoC features general-purpose and highly-parallel graphics processing cores, the Zynq UltraScale+ can process and analyze data as well as make decisions and initiate actuator commands. Xilinx claims that the MPSoC offers a scalable and highly customizable programmable platform that will ensure future-proof customer designs in the quickly changing ADAS space. Besides, increased compute performance of the Zynq UltraScale+ MPSoC will also support the increased radio and baseband processing requirements of next generation 5G systems.

xilinx_zynq_ultrascale

The tape-out of the chip by Xilinx means that the developer will get the first sample of the Zynq UltraScale+ MPSoC several months from now and will start its mass production of the product using TSMC’s most advanced 16nm FinFET+ process technology sometimes in mid-2016.

“The Zynq UltraScale+ MPSoC provides an ideal mix of software intelligence, hardware optimization, security and safety, and any-to-any connectivity for the next-generation of smart and connected applications,” said Victor Peng, executive vice president and general manager of the programmable products group at Xilinx. “The Zynq UltraScale+ MPSoC has been specifically tailored to meet the unique requirements of next generation embedded vision, including ADAS and the roadmap to autonomous vehicles, industrial-IoT and 5G wireless systems, with applicability to numerous other applications.”

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KitGuru Says: The tape-out of Xilinx confirms that the first wave of chips to be made using TSMC’s CLN16FF+ manufacturing technology has taped out. It is believed that Nvidia Corp.’s code-named GP100 graphics processing unit – the first GPU to be based on the company’s “Pascal” architecture – is also among the first to be made using TSMC’s 16nm FinFET+ fabrication process.

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TSMC: 16nm yields are approaching mature levels https://www.kitguru.net/components/anton-shilov/tsmc-16nm-yields-are-approaching-mature-levels/ https://www.kitguru.net/components/anton-shilov/tsmc-16nm-yields-are-approaching-mature-levels/#respond Tue, 14 Apr 2015 10:33:20 +0000 http://www.kitguru.net/?p=244977 Although Taiwan Semiconductor Manufacturing Co. has delayed mass production of chips using its 16nm fabrication processes, this did not happen only because of low yields. According to the company, 16nm yields at TSMC are approaching mature levels. This year TSMC will offer two 16nm process technologies for clients: 16nm FinFET (CLN16FF) and 16nm FinFET+ (CLN16FF+). …

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Although Taiwan Semiconductor Manufacturing Co. has delayed mass production of chips using its 16nm fabrication processes, this did not happen only because of low yields. According to the company, 16nm yields at TSMC are approaching mature levels.

This year TSMC will offer two 16nm process technologies for clients: 16nm FinFET (CLN16FF) and 16nm FinFET+ (CLN16FF+). Both technologies use FinFET transistors, but rely on the back-end-of-line (BEOL) interconnect flow of the company’s 20nm SOC (CLN20SOC) fabrication process. Usage of FinFET transistors allows to increase clock-rate potential of chips by up to 40 per cent at the same power over chips made using 20nm technology.

TSMC claims that 16nm FinFET+ provides up to 15 per cent performance improvement over the 16nm FinFET at the same level of power consumption. At the same frequency, integrated circuits produced using 16nm FinFET+ are projected to consume 30 per cent less power compared to the same chips made using 16nm FinFET.

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TSMC originally planned to start making 16nm chips in early 2015, but had to postpone the beginning of volume production due to undisclosed reasons. While TSMC’s motives to delay mass production were unclear, it does not look like the company has major problems with yields. According to Y.J. Mii, vice president of R&D at TSMC, CLN16FF+ yield is already approaching CLN20SoC yield (which is mature enough to use for commercial products), according to a Cadence blog post. The VP reportedly said that the 16FF+ provided better maturity at risk production than any previous TSMC process.

TSMC has received over 12 CLN16FF+ tape outs so far and expects more than 50 product tape outs this year. High-volume production will begin in the third quarter, with meaningful revenue contribution starting in the Q4 2015.

Discuss on our Facebook page, HERE.

KitGuru Says: While it looks like TSMC’s 16nm yields are reasonably high, keep in mind that the company’s 16nm chips have the same die sizes as ICs made using 20nm process tech. Since TSMC naturally charges extra for FinFET transistors as well as extra performance and lower power, per-gate costs of products made using 16nm FinFET technologies should be pretty high. As a result, to make those chips economically feasible, TSMC’s clients require generally very high yields.

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TSMC unveils third 16nm process for ultra-low-power, high-performance devices https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-unveils-third-16nm-process-for-ultra-low-power-high-performance-devices/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-unveils-third-16nm-process-for-ultra-low-power-high-performance-devices/#respond Fri, 16 Jan 2015 08:10:31 +0000 http://www.kitguru.net/?p=230879 Taiwan Semiconductor Manufacturing Co. has confirmed that it is developing yet another version of its 16nm FinFET fabrication process. The new manufacturing technology will be used to make chips for ultra-low-power as well as high-performance applications. “We are also working on 16nm ULP technology development,” said Mark Liu, co-CEO of TSMC, during a conference call …

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Taiwan Semiconductor Manufacturing Co. has confirmed that it is developing yet another version of its 16nm FinFET fabrication process. The new manufacturing technology will be used to make chips for ultra-low-power as well as high-performance applications.

“We are also working on 16nm ULP technology development,” said Mark Liu, co-CEO of TSMC, during a conference call with investors and financial analyst. “This 16nm ULP design kits will be available in June this year. It will be suitable for both high performance and ultra-low power or ultra-low voltage, less than 0.6V applications.”

At present TSMC offers 16nm FinFET (CLN16FF) and 16nm FinFET+ (CLN16FF+) manufacturing technologies to its customers. Both provide significant performance and power saving improvements compared to TSMC’s 28nm and 20nm fabrication processes thanks to FinFET transistors. While the 16FF and the 16FF+ share the same metal backend process with 20nm SOC technology and therefore cannot reduce chip area, semiconductors made using the 16nm processes are considerably smaller than those produced using 28nm tech.

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About a year ago rumours emerged that TSMC was developing its third 16nm process technology, which was supposed to be called 16nm FinFET Turbo. It looks like the 16nm FinFET ULP technology is the 16nm FinFET Turbo as it is expected to provide certain clock-rate improvements for devices that need it. In addition, the 16nm ULP manufacturing process will help TSMC to cut-down power consumption of system-on-chips for Internet-of-Things and wearable devices.

As usually, TSMC did not unveil a lot of information regarding the 16nm FinFET ultra-low-power process technology. It is not clear when TSMC plans to start making 16nm FinFET ULP chips in volume, but it is logical to expect such chips to be ready in late 2016 or early 2017.

Discuss on our Facebook page, HERE.

KitGuru Says: Three versions of 16nm FinFET fabrication processes indicate that the node will be used for quite a long time.

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TSMC delays mass production using 16nm FinFET process to Q3 2015 https://www.kitguru.net/components/anton-shilov/tsmc-delays-mass-production-using-16nm-finfet-process-to-q3-2015/ https://www.kitguru.net/components/anton-shilov/tsmc-delays-mass-production-using-16nm-finfet-process-to-q3-2015/#respond Fri, 16 Jan 2015 00:00:09 +0000 http://www.kitguru.net/?p=230858 Taiwan Semiconductor Manufacturing Co. has clarified the timeframe when it intends to start mass production of chips using 16nm FinFET fabrication process. The world’s largest contract maker of semiconductors once again will delay 16nm FF volume production by a month or two to the third quarter of 2015. Back in October, 2014, TSMC already said …

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Taiwan Semiconductor Manufacturing Co. has clarified the timeframe when it intends to start mass production of chips using 16nm FinFET fabrication process. The world’s largest contract maker of semiconductors once again will delay 16nm FF volume production by a month or two to the third quarter of 2015.

Back in October, 2014, TSMC already said that it would move mass production of chips using its 16nm FinFET manufacturing technology from early 2015 to Q2 or early Q3 2015. This week the company said that the aforementioned semiconductors will be made only sometimes in the third quarter of the year, which essentially means another delay, albeit, a slight one.

“We plan to mass produce 16nm FinFET [chips] in the third quarter of 2015,” said Lora Ho, senior vice president and chief financial officer of TSMC.

It will take the company around seven quarters to bring profit margins it receives from 16nm FinFET manufacturing to corporate average levels, according to the CFO. This year the company plans to produce 50 chip designs using the 16nm FinFET fabrication process.

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TSMC’s 16nm FinFET (CLN16FF)and 16nm FinFET+ (which TSMC officially calls 16nm FinFET Plus) process technologies rely on the back-end-of-line (BEOL) interconnect flow of the company’s 20nm SOC (CLN20SOC) fabrication process, but use FinFET transistors instead of planar transistors. This provides additional performance and/or power savings, but this does not allow to significantly shrink the size of chips compared to chips made using the 20nm SOC. The proven BEOL interconnect flow means that it should be easier for TSMC to start mass production of chips using its 16FF and 16FF+ manufacturing technologies.

It is unclear how delay of mass production using 16nm FinFET process technology affects schedules of the 16nm FinFET+.

TSMC expects the capital expenditures for 2015 to be between $11.5 billion and $12 billion. 80 per cent of the company’s CapEx will be spent on development of 10nm and thinner manufacturing technologies, tools necessary to make chips using 16nm and 20nm fabrication processes as well as on other leading-edge technologies-related things.

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KitGuru Says: The situation with FinFET process technologies in general remains blurry. It is unclear when GlobalFoundries plans to start production chips using 14nm FinFET process it licensed from Samsung.  Moreover, the volumes of 14nm FinFET chip wafers processed at Samsung are a complete mystery.

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Nvidia committed to its ‘Denver’ processor, will use it in future SoCs https://www.kitguru.net/components/cpu/anton-shilov/nvidia-committed-to-its-denver-processor-will-use-it-in-future-designs/ https://www.kitguru.net/components/cpu/anton-shilov/nvidia-committed-to-its-denver-processor-will-use-it-in-future-designs/#respond Tue, 06 Jan 2015 05:10:20 +0000 http://www.kitguru.net/?p=229064 Although Nvidia Corp. decided not to use its custom ARMv8-compatible 64-bit “Denver” core inside its Tegra X1 system-on-chip, the company claims that it can use it inside other application processors. What is unclear is when and inside which application processors. “The reason we did not use Denver on Tegra X1 is that we decided to …

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Although Nvidia Corp. decided not to use its custom ARMv8-compatible 64-bit “Denver” core inside its Tegra X1 system-on-chip, the company claims that it can use it inside other application processors. What is unclear is when and inside which application processors.

“The reason we did not use Denver on Tegra X1 is that we decided to take a ‘tick tock’ approach to launching our processors,” an official statement by Nvidia published by ArsTechnica reads. “Since TX1 is on a brand new 20nm process we decided to use off the shelf ARM cores. But Tegra K1 was on a well understood [28nm] process and hence we decided to use Denver on it. We still have Denver on our roadmap and will be using it in our future chips as processes mature.”

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Nvidia first revealed details about its code-named Denver general-purpose 64-bit custom ARMv8-compatible core in early 2013. The core was expected to first emerge in Nvidia Tegra design code-named “Parker”, which was supposed to feature “Maxwell” graphics and to be made using 16nm FinFET process technology. The “Parker” was due in 2015.

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As soon as it turned out that TSMC’s 16nm FinFET fabrication process would not be ready for mass production in the first half of 2015, Nvidia decided to incorporate “Denver” into the 64-bit version of Tegra K1 “Logan” (with “Kepler” graphics), which is made using 28nm fabrication process. The “Parker” chip was thrown out from Nvidia’s roadmap and the code-named “Erista” SoC replaced it.

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Tegra roadmap, image by AnandTech

The “Denver” core was developed from the ground-up for the 16nm FinFET process technology. Integrating the core into a 28nm design was hardly an optimal choice given die size, power consumption and other factors. Nvidia has never explained why it needed to create 64-bit Tegra K1 chip based on the “Denver” cores. Most probably, it needed software developers to lay their hands on its custom microprocessor design in order to ensure that future apps will be fully optimized for Nvidia’s high-performance ARMv8 cores.

It is logical to expect Nvidia to incorporate “Denver” into its application processors to be made using 16nm FinFET process technology, just like it planned originally with the code-named “Parker” AP. Unfortunately, since TSMC’s 16nm FinFET manufacturing technology is at least two quarters away, it is unknown when Nvidia will be able to commercialize such chip. Depending on design readiness, this could happen only late this year at the earliest. Keeping in mind Nvidia’s typical Tegra schedules, expect the new chip to arrive only in early 2016.

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KitGuru Says: It looks that the mess TSMC and other foundries created with availability of process technologies also generated a mess with product designs. As a result, Nvidia had to redesign its “Maxwell” graphics architecture as well as to change its Tegra roadmap significantly.

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ASML readies equipment to produce 5nm chips https://www.kitguru.net/components/anton-shilov/asml-readies-equipment-to-produce-5nm-chips/ https://www.kitguru.net/components/anton-shilov/asml-readies-equipment-to-produce-5nm-chips/#respond Thu, 27 Nov 2014 04:46:45 +0000 http://www.kitguru.net/?p=223779 We do not know exactly when companies like Intel Corp., Samsung Electronics or Taiwan Semiconductor Manufacturing Co. make their first chips using 7nm, 5nm, 3nm or 2nm process technologies. But we do know what should happen before leading semiconductor producers manufacture their new chips using ultra-thin process technologies: ASML should sell them appropriate tools to do …

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We do not know exactly when companies like Intel Corp., Samsung Electronics or Taiwan Semiconductor Manufacturing Co. make their first chips using 7nm, 5nm, 3nm or 2nm process technologies. But we do know what should happen before leading semiconductor producers manufacture their new chips using ultra-thin process technologies: ASML should sell them appropriate tools to do so.

At its investor day in London earlier this week ASML outlined its roadmap till 2019 – 2020. The world’s largest producer of lithography equipment for production of chips believes that while current-generation deep ultraviolet (DUV) with multi-patterning as well as other ways of shrinking geometry of integrated circuits will work for a number of years to come, eventually makers of chips – whether they manufacture memory or logic – will have to transit to extreme ultraviolet lithography (EUV). In general, the industry experts agree with ASML, so when it comes to sub-10nm fabrication processes, the chipmakers and ASML invest a lot in EUV.

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At present ASML offers NXE:3300B semi-experimental EUV scanner (which will be upgraded in 2015 – 2016 with new light source to support commercial production volumes) as well as NXE:3350B EUV scanner to makers of semiconductors. The scanners support 16nm half-pitch (HP) resolution and are expected to be used for production of chips using 10nm and 7nm process technologies. However, to support thinner process technologies new manufacturing equipment will be needed.

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To make chips using 5nm fabrication process, ASML believes that it will need to reduce the the half-pitch resolution of the generated patterns to 13nm. To do so, the company plans to upgrade the NXE:3350B and to introduce its all-new NXE:3400B EUV scanners in the second half of 2017 or sometimes in 2018. Using the new equipment, semiconductor manufacturers will be able to start learning how to make integrated circuits using 5nm manufacturing technology in 2018, more than two years before such chips will be made commercially.

In addition to development of its NXE:3350B OFP and NXE:3400B scanners ASML already envisions requirements for semiconductor manufacturing equipment that will be used around ten years from now to make chips using 3nm and 2nm process technologies.

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KitGuru Says: Despite of the fact that many predict the end for Moore’s Law, it looks like it will continue to be valid for another ten years. At least, ASML and Intel clearly think so.

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TSMC to have four EUV scanners in 2015, to use EUV tools for 10nm chips https://www.kitguru.net/components/anton-shilov/tsmc-to-have-four-euv-scanners-in-2015-to-use-euv-tools-for-10nm-chips/ https://www.kitguru.net/components/anton-shilov/tsmc-to-have-four-euv-scanners-in-2015-to-use-euv-tools-for-10nm-chips/#respond Wed, 26 Nov 2014 23:47:08 +0000 http://www.kitguru.net/?p=223727 Taiwan Semiconductor Manufacturing Co. has ordered two additional extreme ultraviolet (EUV) lithography scanners from ASML Holding. The equipment will be delivered in 2015 and will complement initial two EUV scanners TSMC has today, which will be upgraded. Four scanners will let TSMC make chips using 10nm process technology and EUV lithography tech in commercial quantities. Next …

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Taiwan Semiconductor Manufacturing Co. has ordered two additional extreme ultraviolet (EUV) lithography scanners from ASML Holding. The equipment will be delivered in 2015 and will complement initial two EUV scanners TSMC has today, which will be upgraded. Four scanners will let TSMC make chips using 10nm process technology and EUV lithography tech in commercial quantities.

Next year ASML will deliver two NXE:3350B EUV systems to TSMC. In addition, ASML will upgrade TSMC’s existing NXE:3300B systems with new light sources that will increase their production capacity to the levels of NXE:3350B, which will allow the world’s largest contract maker of semiconductors to start volume commercial production of 10nm chips using EUV lithography equipment sometimes in 2016 – 2017.

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At present ASML’s NXE:3300B scanners – which are installed at various semiconductor manufacturing facilities across the world – feature 80W light sources and can process about or over 500 wafers per day. Sometimes next year ASML will have 125W light sources for the NXE:3300B and the NXE:3350B systems, which will boost their productivity to 1000+ wafers per day, which may be nearly enough to start commercial usage. In 2016 the company plans to supply 250W light sources that will further increase productivity to 1500 wafers per day.

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While ASML itself has a solid roadmap for EUV equipment in place and everything depends on whether it can deliver more powerful light sources on time, other companies are only ready with EUV infrastructure acceptable for 10nm node. Improvements are required for volume production at 7nm node. Meanwhile, Intel Corp. and, apparently, some other big players, only plan to adopt EUV at 7nm.

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KitGuru Says: With four EUV scanners installed, TSMC will clearly make the majority of its 10nm chips using EUV lithography, which may provide it a lot of benefits compared to other foundries, if all goes well. But what if it does not?

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TSMC begins to risk-produce 16FF+ chips for Nvidia, MediaTek, LG, Xilinx, others https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-begins-to-risk-produce-16ff-chips-for-nvidia-mediatek-lg-xilinx-others/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-begins-to-risk-produce-16ff-chips-for-nvidia-mediatek-lg-xilinx-others/#comments Wed, 12 Nov 2014 23:44:06 +0000 http://www.kitguru.net/?p=221629 Taiwan Semiconductor Manufacturing Co. on Wednesday said that it has begun producing chips using its 16nm FinFET+ (16FF+) manufacturing technology. The new process technology will be used by a number of TSMC’s partners to make their leading edge chips due next year. Among the first companies to adopt the improved 16nm FinFET process technology from TSMC …

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Taiwan Semiconductor Manufacturing Co. on Wednesday said that it has begun producing chips using its 16nm FinFET+ (16FF+) manufacturing technology. The new process technology will be used by a number of TSMC’s partners to make their leading edge chips due next year. Among the first companies to adopt the improved 16nm FinFET process technology from TSMC will be Nvidia, MediaTek, LG Electronics and others.

If TSMC starts risk production of chips using 16nm FinFET+ process technology now, expect commercial products made using 16FF+ fabrication process to arrive in the late third quarter of 2015 at the earliest. TSMC officially anticipates that the 16FF+ volume ramp will begin around July in 2015.

TSMC’s 16nm FinFET (CLN16FF) and 16nm FinFET+ (CLN16FF+) process technologies rely on the back-end-of-line (BEOL) interconnect flow of the company’s 20nm SOC (CLN20SOC) fabrication process, but use FinFET transistors instead of planar transistors. Such hybrid approach to CLN16FF process technologies provides additional performance and/or power savings, but does not allow to significantly shrink the size of chips compared to chips made using the 20nm SOC technology. The proven BEOL interconnect flow means that it gets easier for TSMC to start mass production of chips using its 16FF and 16FF+ manufacturing technologies.

“Our successful ramp-up in 20SoC has blazed a trail for 16FF and 16FF+, allowing us to rapidly offer a highly competitive technology to achieve maximum value for customers’ products,” said Mark Liu, the president and co-CEO of TSMC. “We believe this new process can provide our customers the right balance between performance and cost so they can best meet their design requirements and time-to-market goals.”

According to TSMC, 16nm FinFET+ provides up to 15 per cent performance improvement over the 16nm FinFET at the same level of power consumption. At the same clock-rate, chips produced using 16nm FinFET+ are expected to consume 30 per cent less power compared to the same chips made using 16nm FinFET. Products manufactured using 16nm FinFET+ will offer up to 40 per cent speed improvement over chips made using 20nm technology, or will consume 50 per cent lower amount of power at the same clock-rate.

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The 16FF+ process is on track to pass full reliability qualification later in November, and nearly 60 customer designs are currently scheduled to tape out by the end of 2015. Among the early adopters of TSMC’s 16nm FinFET+ fabrication processes are Avago, Freescale, Nvidia, MediaTek, LG Electronics, Renesas, Xilinx,

“Nvidia and TSMC have collaborated for more than 15 years to deliver complex GPU architectures on state-of-the-art process nodes,” said Jeff Fisher, senior vice president of GeForce business unit at Nvidia. “Our partnership has delivered well over a billion GPUs that are deployed in everything from automobiles to supercomputers. Through working together on the next-generation 16nm FinFET process, we look forward to delivering industry-leading performance and power efficiency with future GPUs and SoCs.”

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KitGuru Says: Keeping in mind that many of 16FF+ adopters are unlikely to make chips using 16FF process technology, it looks like a number of companies, including Nvidia, MediaTek and LG will unlikely offer brand-ne chips made using a next-generation process technology before fall 2015. It is noteworthy that AMD is not among the early adopters of TSMC's 16FF+ process technology.

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TSMC postpones mass production of 16nm chips to Q2 2015 https://www.kitguru.net/channel/generaltech/anton-shilov/tsmc-slightly-postpones-mass-production-of-16nm-chips-to-q2-2015/ https://www.kitguru.net/channel/generaltech/anton-shilov/tsmc-slightly-postpones-mass-production-of-16nm-chips-to-q2-2015/#comments Fri, 17 Oct 2014 22:39:46 +0000 http://www.kitguru.net/?p=217340 Taiwan Semiconductor Manufacturing Co. on Thursday gave an update regarding the status of its 16nm fabrication processes. The company said that it is satisfied with the yield, but at the same time postponed the start of mass production using its 16nm manufacturing technology from early 2015 to the second or even the third quarter of …

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Taiwan Semiconductor Manufacturing Co. on Thursday gave an update regarding the status of its 16nm fabrication processes. The company said that it is satisfied with the yield, but at the same time postponed the start of mass production using its 16nm manufacturing technology from early 2015 to the second or even the third quarter of 2015.

TSMC’s 16nm FinFET (CLN16FF)and 16nm FinFET+ (which TSMC officially calls 16nm FinFET Plus) process technologies rely on the back-end-of-line (BEOL) interconnect flow of the company’s 20nm SOC (CLN20SOC) fabrication process, but use FinFET transistors instead of planar transistors. This provides additional performance and/or power savings, but this does not allow to significantly shrink the size of chips compared to chips made using the 20nm SOC. The proven BEOL interconnect flow means that it will be easier for TSMC to start mass production of chips using its 16FF and 16FF+ manufacturing technologies.

But while TSMC is happy with the initial yields of its 16nm FinFET process technologies, it will not start mass production using the tech in early 2015, like it planned, but will initiate volume manufacturing in Q2 or even Q3.

“On the yield learning side, the progress [of 16nm] is much better than our original plan,” said C.C. Wel, co-CEO of TSMC. “This is because the 16nm uses similar [BEOL] process to 20SOC, except for the transistor. Because of the excellent progress in yield learning and readiness in manufacturing maturity and also to meet customers' demand, we plan to pull in 16-nanometer volume production through the end of Q2 next year or early Q3 year 2015.”

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At present TSMC expects to have close to 60 16nm tape-outs by the end of next year. At present the company has about 30 20nm tape-outs, hence, it is evident that the 16nm technology is more popular among its customers than the 20nm tech.

The actual reason why TSMC decided to delay mass production of chips on the 16nm node is unclear. The world's largest contract maker of semiconductors continuously expands its 20nm/16nm capacities, but demand for 20nm chips is growing rapidly because of Apple, for which TSMC builds the A8/A8X processors. As sales of the new iPhones and iPads increase, Apple is boosting orders to TSMC and thus requires higher production capacities. It is possible that TSMC decided to make sure it has sufficient amount of capacities for everyone and delayed the ramp-up of 16nm manufacturing.

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KitGuru Says: It will be interesting to see the competition between products made using 20nm and 16nm process technologies at TSMC next year. From the cost perspective they should be the same, but 16nm chips will be faster and more power efficient.

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TSMC reveals new 16nm FinFET+ process, vows to start 10nm production in Q4 2015 https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-reveals-new-16nm-finfet-process-vows-to-start-10nm-production-in-q4-2015/ https://www.kitguru.net/components/graphic-cards/anton-shilov/tsmc-reveals-new-16nm-finfet-process-vows-to-start-10nm-production-in-q4-2015/#respond Fri, 18 Apr 2014 10:03:38 +0000 http://www.kitguru.net/?p=188020 Taiwan Semiconductor Manufacturing Co. this week unveiled an improved version of its 16nm FinFET process technology that will hit volume production in 2015. In addition, the company revealed some details regarding its 10nm FinFET fabrication process and said that it would start risk production using the technology in Q4 2015, so volume production will commence …

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Taiwan Semiconductor Manufacturing Co. this week unveiled an improved version of its 16nm FinFET process technology that will hit volume production in 2015. In addition, the company revealed some details regarding its 10nm FinFET fabrication process and said that it would start risk production using the technology in Q4 2015, so volume production will commence sometimes in 2016 – 2017.

At present TSMC and its customers are experimenting with risk production of chips using 16nm FinFET manufacturing process (CLN16FF), which will be used to make commercial chips starting early 2015. However, the company has already developed 16nm FinFET+ fabrication process that will be utilised to make chips in volume later in 2015. In fact, TSMC expects the majority of its customers to use the 16nm FinFET+ version of the process due to its noticeable benefits compared to the original.

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According to TSMC, 16nm FinFET+ provides up to 15 per cent performance improvement over the 16nm FinFET at the same level of power consumption. At the same clock-rate, chips produced using 16nm FinFET+ are expected to consume 30 per cent less power compared to the same chips made using 16nm FinFET. Products manufactured using 16nm FinFET+ will offer up to 40 per cent speed improvement over chips made using 20nm technology.

Design rules of 16nm FinFET and 16nm FinFET+ are the same, everything is largely compatible. In general, 16nm FinFET designs can easily be produced on the 16nm FinFET+ node with minimal changes (if needed). The process will be fully qualified by September. According to TSMC, its fabs are 95 per cent ready to produce chips using 16nm FinFET+. It should be noted that 20nm manufacturing capacities that are online now and which are scheduled to be online this year are 95 per cent ready to produce chips using 16nm FinFET, so expect TSMC to be able to ramp up volume production using both 16nm FinFET and 16nm FinFET+ very quickly.

First fifteen 16nm FinFET+ tape-outs are planned for 2014, another 45 are scheduled for 2015. Previously it was reported that TSMC expected 25 16nm FinFET tape-outs in 2014.

It is interesting to note that there is a rumour about yet another 16nm process technology from TSMC called 16nm FinFET turbo. So far TSMC has not confirmed them.

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While the 16nm FinFET and 16nm FinFET+ will be TSMC’s next step(s), the following step after that will be 10nm FinFET manufacturing process. It will be the company’s third-generation technology with FinFET transistors and it is expected to further cut power consumption and increase performance.

Based on TSMC’s predictions, its 10nm FinFET will offer over 25 per cent clock-rate improvement over the 16nm FinFET+ at the same power, it is expected to be 45 per cent more energy efficient and it is predicted to provide 2.2 times higher density over 16nm FinFET+. Currently 10nm FinFET development is in progress, the risk production is on-track to start in Q4 2015.

If everything goes as planned, TSMC ramps up volume production using its new technologies a year after the beginning or risk production and there will no delays, then expect companies like AMD, Nvidia and Qualcomm to offer chips produced using 16nm technologies in 2015 – 2016 and 10nm fabrication process in late-2016 – 2017.

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KitGuru Says: TSMC these days is showing maximum agility when it comes to development of new process technologies and ramping up production capacities. With 10nm FinFET fabrication process on-track for volume manufacturing in 2017, the company will compete head to head against Intel, which is also expected to start production of Airlake/Cannonlake processors using 10nm process technology in late-2016. However, since each new process technology becomes more complex, chips produced at the leading edge will get more expensive.

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