AMD Zen 6 ‘leak’ suggests compact 12-Core CCDs with 48MB L3 cache

AMD’s next‑generation “Zen 6” microarchitecture may bring some notable changes, according to a new rumour shared by leaker HXL (via VideoCardz). The post claims AMD is considering increasing the core density of its standard CPU Complex Die (CCD) for the first time, moving from the long‑standing 8‑core layout to a 12‑core configuration. The same rumour also mentions a shift to TSMC’s latest process node and a larger L3 cache per CCD.

HXL claims that the new Zen 6 CCDs are full-performance cores designed to maintain high clock speeds, effectively giving the mainstream AM5 platform a 50% boost in multi-core processing power per chiplet. HXL also claims that the increased core count would be enabled by higher transistor density from TSMC’s rumoured N2 (2nm) process.

Cache capacity is also part of the rumour. The L3 cache per CCD is said to increase from 32MB to 48MB, and when paired with a stacked 96MB V‑Cache layer, a single Zen 6 CCD could reach 144MB of L3 cache. Under this scenario, a dual‑CCD, 24‑core CPU might offer up to 288MB of total L3 cache. None of these numbers have been verified by AMD.

KitGuru says: A move to a 12‑core CCD would be a major shift. If AMD were to release a single‑CCD, 12‑core X3D model, it could avoid the scheduling quirks seen on dual‑CCD parts like the 7950X3D while offering more cores than today’s 8‑core gaming‑focused chips. For now, though, all Zen 6 details should be treated as unconfirmed.

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