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AMD X399, X390 leak onto the web, Ryzen 4700, 2700 in the works

Some technical diagrams for the upcoming AMD X399 and a would-be X390 chipset have made a splash on the internet, it seems.

A post on an AMD subreddit included some very convincing chipset block diagrams showing off what looks like the X399 and X390 chipsets, and even a board layout for the latter. AMD, having presented Naples to the public a couple of weeks ago seemed scant on details. Now, if we consider the post a legitimate “reveal”, AMD seems to be packing some serious heat under the hood for the would-be Datacenter- and Workstation-class CPUs.

According to the diagrams we have a clearer picture of the X399 chipset for the upcoming Naples CPU, while X390 is a single-socket implementation of a similar design – the much talked-about single-socket implementation of said Naples. The leak may have also spilled the beans on the naming scheme for the CPUs, with Naples’ SP3 dual sockets labeled RZ4700 (presumably a Ryzen 4700 CPU), and an RZ2700 CPU (again, presumably Ryzen 2700) for the single SP3r2-socket SKU.

The RZ4700 “Naples” and X399 chipset:

The dual socket SP3 configuration provides according to AMD, a whopping 128 PCIe 3.0 lanes, half of which are taken up by the Infinity Fabric interconnect between the two CPUs, 16 lanes dedicated to dual 10GbE (fiber?) connectors, SSD storage (8+4 lanes) and and the rest dedicated for compute-intensive GPU tasks on switched PCIe/GPU slots. On top of that, the diagram describes eight dual-channel memory controllers on each MCM, each driving ECC DIMMs of up to 32GB each (speed rating not specified, but we’ve heard rumours of a “tame” DDR4 2400) for a theoretical maximum of 1TB DDR4 ECC, on the dual-CPU configuration.

X399 and RZ4700 block diagram

Apart from the list of features on the Naples CPU, X399 connects to the CPU cluster through four PCIe lanes and provides additional bandwidth and connectivity equivalent to old-school southbridges: legacy IO, integrated 7.1 audio, BIOS, SATA III (x6), USB 3.1C(x6), USB 3.1(x6), USB 3.0(x6), eSATA(x2), USB 2.0(x6), GPIO, SM-BUS, I2C, 2Gb ethernet, integrated VGA (and DDR3 graphics memory). It also reserves 8 PCIe lanes for a bootable PCIe SSD and sports a TPM module for secure computing.

The RZ2700 and X390 chipset:

The single-socket SP3r2 implementation for RZ2700 differs from its presumed big brother, providing higher integration of features and fusing a lot of the southbridge functionality into the CPU package. For example, the RZ2700 will sport a quad memory controller, addressing what seems to be a maximum 256GB of ECC DDR4-2666, but also include the USB 3.1 controller (3.1C x1, 3.1A x2), some standard I/O, TPU, EPU, I2C bus controller and integrated 7.1 channel audio. It drives a total of 48 PCIe lanes, four of which are reserved for the chipset interconnect, and the remainder 44 lanes distributed among a myriad of features like dual 10GbE, M.2 connector (for an OS SSD), and PCIe slots galore for solid state graphics or more storage.

X390/Z2700

The X390 chipset transfers a lot of circuitry to the CPU package, while providing 16-lane PCIe 2.0 connectivity for a range of storage/high-bandwidth options (eSATA 6Gb, PATA, a PCIe 16x/4x slot, dual GbE, FireWire A x2, FireWire B x1), SGPIO, SATA III (x6) and U.2 (4 lanes).

The motherboard diagram describes an EATX form factor sporting 3 PCIe 3.0 16x slots, one PCIe 2.0 16x/4x slot, M.2 (up to 110mm in length for Enterprise-class SSDs), dual Intel I211AT GbE controllers, six SATA III 6Gb/s connections, 8 DIMM slots for DDR4 2666.

KitGuru Says: At the end of the day, these leaks seem legit and give credit to AMD’s assault on Intel, now in the Datacenter and Uniprocessor Server/Workstation space.

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