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TSMC unveils third 16nm process for ultra-low-power, high-performance devices

Taiwan Semiconductor Manufacturing Co. has confirmed that it is developing yet another version of its 16nm FinFET fabrication process. The new manufacturing technology will be used to make chips for ultra-low-power as well as high-performance applications.

“We are also working on 16nm ULP technology development,” said Mark Liu, co-CEO of TSMC, during a conference call with investors and financial analyst. “This 16nm ULP design kits will be available in June this year. It will be suitable for both high performance and ultra-low power or ultra-low voltage, less than 0.6V applications.”

At present TSMC offers 16nm FinFET (CLN16FF) and 16nm FinFET+ (CLN16FF+) manufacturing technologies to its customers. Both provide significant performance and power saving improvements compared to TSMC’s 28nm and 20nm fabrication processes thanks to FinFET transistors. While the 16FF and the 16FF+ share the same metal backend process with 20nm SOC technology and therefore cannot reduce chip area, semiconductors made using the 16nm processes are considerably smaller than those produced using 28nm tech.

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About a year ago rumours emerged that TSMC was developing its third 16nm process technology, which was supposed to be called 16nm FinFET Turbo. It looks like the 16nm FinFET ULP technology is the 16nm FinFET Turbo as it is expected to provide certain clock-rate improvements for devices that need it. In addition, the 16nm ULP manufacturing process will help TSMC to cut-down power consumption of system-on-chips for Internet-of-Things and wearable devices.

As usually, TSMC did not unveil a lot of information regarding the 16nm FinFET ultra-low-power process technology. It is not clear when TSMC plans to start making 16nm FinFET ULP chips in volume, but it is logical to expect such chips to be ready in late 2016 or early 2017.

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KitGuru Says: Three versions of 16nm FinFET fabrication processes indicate that the node will be used for quite a long time.

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