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AMD patents active bridge chiplet design with integrated cache for next-gen GPUs

AMD is planning to introduce an active bridge chiplet with integrated cache on an upcoming GPU architecture. A new patent filed by the company has been spotted describing the use of the active bridge chiplet, which seems to offer a significant upgrade over the passive bridge chiplet design showed earlier this year.

According to the patent shared on Reddit by u/marakeshmode, the active bridge chiplet would work an intercommunication lane across the chiplet dies. This would also feature a shared L3 cache buffer for all compute units, similar to Infinity Cache on Radeon RX 6000 series GPUs.

The patent further explains that any communication made between the GPU chiplets would go through the active bridge chiplet. For developers, the new GPUs would work as a single, monolithic GPU, ignoring any chiplet-specific considerations from older MCM designs.

 

AMD has been issuing patents suggesting that the company plans to launch MCM GPU designs sooner rather than later. We are still not sure if these new architectures will be employed in consumer-oriented GPUs or if they will end up being used on server-grade compute accelerators.

AMD isn’t the only one working on MCM GPU architectures. Nvidia and Intel are also expected to release GPUs featuring MCM architectures. In Intel’s case, we’re expecting to see a launch in 2022.

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KitGuru says: Regardless of whether they will debut on data centre GPUs or in gaming graphics cards, MCM architectures seem to be the future of GPU design. By the looks of it, it shouldn’t take more than 2 years before we see these new designs available. When do you think will see the first MCM GPU? Will AMD, Intel or Nvidia be the first to make the jump? 

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