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Intel changes Quark roadmap, preps fully-integrated Quark SoC in 2016

Intel Corp.’s Quark system-on-chips for extreme-ultra-low-power devices provide basic compute capabilities for smart appliances, simple robots and even wearable gadgets, but there are a number of reasons that prevent them from becoming popular. Among the key points of Intel’s concerns about the Quark family is low-performance, limited amount of I/O interfaces and lack of integrated graphics controller. Apparently, the company plans to take care of this in the coming years.

In a bid to speed up the Quark roadmap, the world’s largest chipmaker cancelled its code-named “Dublin Bay” application specific standard product (ASSP) chip that was expected to arrive in early 2015 and slightly improve performance of the original Quark X1000 while retaining pin-to-pin compatibility and packaging. Instead of it, the world’s largest chipmaker plans to introduce code-named “Liffey Island” ASSP that will not be pin-to-pin compatible with the first-gen Quark, but will feature both performance and I/O improvements, reports CPU-World.

intel_quark_liffey_island_1

According to slides, which resemble those from Intel’s documents, published by several Chinese web-sites (12), the code-named “Liffey Island” will feature a single-thread Pentium-class P54C core operating at clock-rates up to 533MHz with 16KB L1 cache, 512KB L2 cache and a single-channel DDR3/LPDDR2/LPDDR3/DDR3L memory controller with ECC capability and up to 1066MHz frequency support. The “Liffey Island” ASSPs are projected to integrate a host of industry-standard I/O interfaces, including ACPI, PCI Express 2.0, Gigabit Ethernet, HS UART controller, 25MHz SPI, SD/eMMC/SDIO, PC/GPIO, 8-channel ADC with 11-bit granularity, USB 2.0, I2S and so on. Just like the first-generation Quark, the “Liffey Island” will support internal AMBA (advanced microcontroller bus architecture, which was originally developed by ARM) bus that allows Intel to integrate various IP from other companies into Quark system-on-chips if needed. Thermal design power of the Quark “Liffey Island” is expected to be below 2W.

intel_quark_liffey_island

While the “Liffey Island” seems to be a rather interesting solution for a range of smart consumer electronics devices and appliances, there are considerably more powerful things incoming to Intel’s Quark family.

In 2016 the world’s largest chipmaker intends to introduce an all-new code-named “Seal Beach” ASSP, which will feature substantially higher performance – thanks to a new x86 general-purpose core that supports SSE2 instructions (it is unlikely that Intel plans to add SSE2 to P54C, so expect something new). In addition, the new “Seal Beach” system-on-chip will feature integrated 2D/3D graphics controller, which will make it suitable for applications that have displays and need support for graphics, such as smart-watches.

It is interesting to note that while all Quark processors we knew about so far carried code-names after places in Ireland (Dublin Bay, Liffey Island) since they were developed there, the third-generation Quark carries “Seal Beach” code-name, after a small town in California. While we cannot be sure about that, but it looks like Intel’s third-gen Quark is designed in the U.S., not Ireland.

Intel did not comment on the news-story.

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KitGuru Says: Intel certainly wants to improve Quark as much as possible in order to enable leading-edge applications that are not possible today. The question is whether manufacturers of various devices will actually bite…

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