Intel is working on a new generation of CPU architecture which they promise will be “significantly bigger and closer to the linear curve on performance” than its current Sunny Cove Design.
Currently, Intel’s Sunny Cove architecture offers a substantial bump in instructions per clock (IPC) over Coffee Lake Cores running at equivalent frequencies. A 15-18% increase in IPC for Sunny Cove over Coffee lake is seen as significant progress.
Intel is working on a subsequent architecture for Sunny Cove, which has been touted to offer a 50X increase in transistors over the next few years. We are currently looking at around a 28% increase in per-core transistor counts from current-generation 14nm Coffee Lake CPUs to the 10nm upcoming Ice Lake generation.
Coffee Lake is estimated to contain a transistor per core count of 217 million, while Ice Lake is said to contain 300 million 10nm transistors per core. If Intel’s touted linear IPC boost in future architecture is relative to transistor count, that would provide a seriously impressive hike.
As reported by PCGamesN, Intel’s senior vice president of the Technology, Systems Architecture and Client Group (TSCG) and general manager of the Silicon Engineering Group (SEG), Jim Keller, briefly spoke about the new architecture at his “Moore’s law is not dead tour” saying “We’re working on a generation that’s significantly bigger than this and closer to the linear curve on performance”.
This is not necessarily a view shared by AMD, with CEO Dr Lisa Su recently speaking about the limits of processor scaling going forward: “The pure computation portion of it is actually not that big”.
Intel is not promising to look at IPC again until its Golden Cove design, which has Willow Cove positioned between it and Sunny Cove, with Willow Cove offering narrower gains. With both Willow Cove and Golden Cove a long way off, Intel is still looking to get Sunny Cove into mainstream desktops, in an attempt to catch up with AMD’s recent gains with Ryzen 3000 and move away from the long-running 14nm process.
KitGuru says: What do you think of Intel’s predicated linear IPC count? are these targets achievable or do you agree with AMD’s approach?