Intel and Micron have formed a fruitful partnership, with the pair announcing the production and shipment of the industry’s first 4bits/cell 3D NAND technology this week. These new NAND chips use the proven 64-layer structure, and have achieved 1 terabit (Tb) density per die, making it the highest density flash memory currently available.
Aside from the impressive cell NAND developments, Intel and Micron have also begun making progress on third-generation 96-tier 3D NAND structure. This will provide a 50 percent increase in layers and aims to keep Intel/Micron at the forefront when it comes to NAND density.
Image credit: Micron
Both technology advancements utilise ‘CMOS under the array’ (CuA) technology, which reduces die sizes and allows for four ‘planes’ versus two. Under the hood, this allows Intel and Micron’s NAND to write and read more cells in parallel, boosting both throughput and bandwidth.
The big kicker is that Intel can now pack denser storage in a smaller space, which will lead to cost savings down the road. Micron’s VP of technology development, Scott DeBoer, spoke a little bit about these recent developments in a statement, noting that they are “achieving 33 percent higher array density compared to TLC”. 1Tb NAND is just the beginning too, as we look ahead, Micron and Intel will be “continuing flash technology innovation with the 96-layer structure”.
Once we hit 96-layer NAND, storage will be condensed into even smaller spaces, which will benefit industries across the board.
KitGuru Says: There has been a ton of progress in the NAND flash industry over the last couple of years and it looks like we won’t see things slowing down any time soon.